diff --git a/src/asahi/lib/cmdbuf.xml b/src/asahi/lib/cmdbuf.xml index fc86cfce409..4d1a833d888 100644 --- a/src/asahi/lib/cmdbuf.xml +++ b/src/asahi/lib/cmdbuf.xml @@ -212,6 +212,8 @@ + + diff --git a/src/gallium/drivers/asahi/agx_pipe.c b/src/gallium/drivers/asahi/agx_pipe.c index 76b90b7bd38..8438453df3e 100644 --- a/src/gallium/drivers/asahi/agx_pipe.c +++ b/src/gallium/drivers/asahi/agx_pipe.c @@ -191,7 +191,7 @@ agx_resource_create(struct pipe_screen *screen, /* Arrays and cubemaps have the entire miptree duplicated and page aligned (16K) */ nresource->array_stride = ALIGN_POT(offset, 0x4000); - unsigned size = nresource->array_stride * templ->array_size; + unsigned size = nresource->array_stride * templ->array_size * templ->depth0; pipe_reference_init(&nresource->base.reference, 1); @@ -763,7 +763,7 @@ agx_get_param(struct pipe_screen* pscreen, enum pipe_cap param) return is_deqp ? 1 : 0; case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS: - return is_deqp ? 256 : 0; + return 256; case PIPE_CAP_GLSL_FEATURE_LEVEL: case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY: diff --git a/src/gallium/drivers/asahi/agx_state.c b/src/gallium/drivers/asahi/agx_state.c index 5e9d0655e60..5ea41f00145 100644 --- a/src/gallium/drivers/asahi/agx_state.c +++ b/src/gallium/drivers/asahi/agx_state.c @@ -463,6 +463,10 @@ agx_create_sampler_view(struct pipe_context *pctx, unsigned level = state->u.tex.first_level; assert(state->u.tex.first_layer == 0); + /* Must tile array textures */ + assert((rsrc->modifier != DRM_FORMAT_MOD_LINEAR) || + (state->u.tex.last_layer == state->u.tex.first_layer)); + /* Pack the descriptor into GPU memory */ agx_pack(so->desc->ptr.cpu, TEXTURE, cfg) { cfg.dimension = agx_translate_texture_dimension(state->target); @@ -480,6 +484,11 @@ agx_create_sampler_view(struct pipe_context *pctx, cfg.unk_mipmapped = rsrc->mipmapped; cfg.unk_2 = false; + if (state->target == PIPE_TEXTURE_3D) + cfg.depth = u_minify(texture->depth0, level); + else + cfg.depth = state->u.tex.last_layer - state->u.tex.first_layer + 1; + cfg.stride = (rsrc->modifier == DRM_FORMAT_MOD_LINEAR) ? (rsrc->slices[level].line_stride - 16) : AGX_RT_STRIDE_TILED; @@ -726,9 +735,9 @@ agx_set_framebuffer_state(struct pipe_context *pctx, const struct util_format_description *desc = util_format_description(surf->format); unsigned level = surf->u.tex.level; + unsigned layer = surf->u.tex.first_layer; - assert(surf->u.tex.first_layer == 0); - assert(surf->u.tex.last_layer == 0); + assert(surf->u.tex.last_layer == layer); agx_pack(ctx->render_target[i], RENDER_TARGET, cfg) { cfg.layout = agx_translate_layout(tex->modifier); @@ -740,7 +749,7 @@ agx_set_framebuffer_state(struct pipe_context *pctx, cfg.width = state->width; cfg.height = state->height; cfg.level = surf->u.tex.level; - cfg.buffer = tex->bo->ptr.gpu; + cfg.buffer = tex->bo->ptr.gpu + layer * tex->array_stride; if (tex->mipmapped) cfg.unk_55 = 0x8;