From a7155121773059ec34a4d4f3f420ae481fcf9092 Mon Sep 17 00:00:00 2001 From: Rohan Garg Date: Thu, 15 Feb 2024 20:23:18 +0100 Subject: [PATCH] intel/brw: adjust the copy propgation pass to account for wider GRF's on Xe2+ Signed-off-by: Rohan Garg Reviewed-by: Francisco Jerez Reviewed-by: Ian Romanick Part-of: --- src/intel/compiler/brw_fs_copy_propagation.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_fs_copy_propagation.cpp b/src/intel/compiler/brw_fs_copy_propagation.cpp index 6bdd7da9e2c..64d00ce12e4 100644 --- a/src/intel/compiler/brw_fs_copy_propagation.cpp +++ b/src/intel/compiler/brw_fs_copy_propagation.cpp @@ -771,7 +771,7 @@ try_copy_propagate(const brw_compiler *compiler, fs_inst *inst, */ if (has_dst_aligned_region_restriction(devinfo, inst, dst_type) && entry_stride != 0 && - (reg_offset(inst->dst) % REG_SIZE) != (reg_offset(entry->src) % REG_SIZE)) + (reg_offset(inst->dst) % (REG_SIZE * reg_unit(devinfo))) != (reg_offset(entry->src) % (REG_SIZE * reg_unit(devinfo)))) return false; /* The <8;8,0> regions used for FS attributes in multipolygon