From a63e5f015ed8e891a96556276a2597cbb361a096 Mon Sep 17 00:00:00 2001 From: Boyuan Zhang Date: Wed, 9 Jul 2025 12:25:32 -0400 Subject: [PATCH] radeon/vcn: add gaps_in_frame flag to h264 sps Implement gaps_in_frame_num_value_allowed_flag in h264 msg buffer. Replace hardcoded flag values with defines. Signed-off-by: Boyuan Zhang Reviewed-by: David Rosca Part-of: --- src/amd/common/ac_vcn_dec.h | 7 ++++++- src/gallium/drivers/radeonsi/radeon_vcn_dec.c | 14 ++++++++++---- 2 files changed, 16 insertions(+), 5 deletions(-) diff --git a/src/amd/common/ac_vcn_dec.h b/src/amd/common/ac_vcn_dec.h index 7c9d409bf6b..975d65e769d 100644 --- a/src/amd/common/ac_vcn_dec.h +++ b/src/amd/common/ac_vcn_dec.h @@ -151,7 +151,12 @@ #define RDECODE_FEEDBACK_PROFILING 0x00000001 -#define RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT 7 +#define RDECODE_SPS_INFO_H264_DIRECT_8X8_INFERENCE_FLAG_SHIFT 0 +#define RDECODE_SPS_INFO_H264_MB_ADAPTIVE_FRAME_FIELD_FLAG_SHIFT 1 +#define RDECODE_SPS_INFO_H264_FRAME_MBS_ONLY_FLAG_SHIFT 2 +#define RDECODE_SPS_INFO_H264_DELTA_PIC_ORDER_ALWAYS_ZERO_FLAG_SHIFT 3 +#define RDECODE_SPS_INFO_H264_GAPS_IN_FRAME_NUM_VALUE_ALLOWED_FLAG_SHIFT 5 +#define RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT 7 #define RDECODE_VP9_PROBS_DATA_SIZE 2304 diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_dec.c b/src/gallium/drivers/radeonsi/radeon_vcn_dec.c index c1d8086dce4..7cf8e062637 100644 --- a/src/gallium/drivers/radeonsi/radeon_vcn_dec.c +++ b/src/gallium/drivers/radeonsi/radeon_vcn_dec.c @@ -76,10 +76,16 @@ static rvcn_dec_message_avc_t get_h264_msg(struct radeon_decoder *dec, result.level = dec->base.level; result.sps_info_flags = 0; - result.sps_info_flags |= pic->pps->sps->direct_8x8_inference_flag << 0; - result.sps_info_flags |= pic->pps->sps->mb_adaptive_frame_field_flag << 1; - result.sps_info_flags |= pic->pps->sps->frame_mbs_only_flag << 2; - result.sps_info_flags |= pic->pps->sps->delta_pic_order_always_zero_flag << 3; + result.sps_info_flags |= pic->pps->sps->direct_8x8_inference_flag + << RDECODE_SPS_INFO_H264_DIRECT_8X8_INFERENCE_FLAG_SHIFT; + result.sps_info_flags |= pic->pps->sps->mb_adaptive_frame_field_flag + << RDECODE_SPS_INFO_H264_MB_ADAPTIVE_FRAME_FIELD_FLAG_SHIFT; + result.sps_info_flags |= pic->pps->sps->frame_mbs_only_flag + << RDECODE_SPS_INFO_H264_FRAME_MBS_ONLY_FLAG_SHIFT; + result.sps_info_flags |= pic->pps->sps->delta_pic_order_always_zero_flag + << RDECODE_SPS_INFO_H264_DELTA_PIC_ORDER_ALWAYS_ZERO_FLAG_SHIFT; + result.sps_info_flags |= pic->pps->sps->gaps_in_frame_num_value_allowed_flag + << RDECODE_SPS_INFO_H264_GAPS_IN_FRAME_NUM_VALUE_ALLOWED_FLAG_SHIFT; result.sps_info_flags |= ((dec->dpb_type >= DPB_DYNAMIC_TIER_2) ? 0 : 1) << RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT;