From a548ec7ad497057647e363c66351893bc45f4f3f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Tue, 21 May 2024 13:25:13 -0400 Subject: [PATCH] radeonsi/gfx12: disable CU1 instead of CU0 for GS due to SQTT SQTT captures traces from CU0, so we need to keep it enabled. Acked-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeonsi/si_state.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 2b532c24032..4cdb7876706 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -6397,7 +6397,7 @@ static void gfx12_init_gfx_preamble_state(struct si_context *sctx) si_pm4_set_reg(pm4, R_00B218_SPI_SHADER_PGM_HI_ES, S_00B324_MEM_BASE(sscreen->info.address32_hi >> 8)); si_pm4_set_reg_idx3(pm4, R_00B21C_SPI_SHADER_PGM_RSRC3_GS, - ac_apply_cu_en(0xfffffefe, 0, 0, &sscreen->info)); + ac_apply_cu_en(0xfffffdfd, 0, 0, &sscreen->info)); si_pm4_set_reg(pm4, R_00B2C8_SPI_SHADER_USER_ACCUM_ESGS_0, 0); si_pm4_set_reg(pm4, R_00B2CC_SPI_SHADER_USER_ACCUM_ESGS_1, 0); si_pm4_set_reg(pm4, R_00B2D0_SPI_SHADER_USER_ACCUM_ESGS_2, 0);