diff --git a/src/intel/compiler/brw_asm_tool.c b/src/intel/compiler/brw_asm_tool.c
index 6e4a5fce52d..8b203b0ae62 100644
--- a/src/intel/compiler/brw_asm_tool.c
+++ b/src/intel/compiler/brw_asm_tool.c
@@ -103,7 +103,7 @@ print_instruction(FILE *output, bool compact, const brw_inst *instruction)
 }
 
 static struct intel_device_info *
-i965_disasm_init(uint16_t pci_id)
+i965_asm_init(uint16_t pci_id)
 {
    struct intel_device_info *devinfo;
 
@@ -118,16 +118,18 @@ i965_disasm_init(uint16_t pci_id)
       return NULL;
    }
 
+   if (devinfo->ver < 9) {
+      fprintf(stderr, "device has gfx version %d but must be >= 9, try elk_asm instead",
+              devinfo->ver);
+      exit(EXIT_FAILURE);
+   }
+
    return devinfo;
 }
 
 static bool
 i965_postprocess_labels()
 {
-   if (p->devinfo->ver < 6) {
-      return true;
-   }
-
    void *store = p->store;
 
    struct target_label *tlabel;
@@ -151,11 +153,7 @@ i965_postprocess_labels()
                case BRW_OPCODE_ELSE:
                case BRW_OPCODE_ENDIF:
                case BRW_OPCODE_WHILE:
-                  if (p->devinfo->ver >= 7) {
-                     brw_inst_set_jip(p->devinfo, inst, relative_offset);
-                  } else if (p->devinfo->ver == 6) {
-                     brw_inst_set_gfx6_jump_count(p->devinfo, inst, relative_offset);
-                  }
+                  brw_inst_set_jip(p->devinfo, inst, relative_offset);
                   break;
                case BRW_OPCODE_BREAK:
                case BRW_OPCODE_HALT:
@@ -170,13 +168,7 @@ i965_postprocess_labels()
                switch (opcode) {
                case BRW_OPCODE_IF:
                case BRW_OPCODE_ELSE:
-                  if (p->devinfo->ver > 7) {
-                     brw_inst_set_uip(p->devinfo, inst, relative_offset);
-                  } else if (p->devinfo->ver == 7) {
-                     brw_inst_set_uip(p->devinfo, inst, relative_offset);
-                  } else if (p->devinfo->ver == 6) {
-                     // Nothing
-                  }
+                  brw_inst_set_uip(p->devinfo, inst, relative_offset);
                   break;
                case BRW_OPCODE_WHILE:
                case BRW_OPCODE_ENDIF:
@@ -303,7 +295,7 @@ int main(int argc, char **argv)
       }
    }
 
-   devinfo = i965_disasm_init(pci_id);
+   devinfo = i965_asm_init(pci_id);
    if (!devinfo) {
       fprintf(stderr, "Unable to allocate memory for "
                       "intel_device_info struct instance.\n");
diff --git a/src/intel/compiler/brw_gram.y b/src/intel/compiler/brw_gram.y
index a32b2bffb0c..3b32661d124 100644
--- a/src/intel/compiler/brw_gram.y
+++ b/src/intel/compiler/brw_gram.y
@@ -117,12 +117,6 @@ i965_asm_unary_instruction(int opcode, struct brw_codegen *p,
 	case BRW_OPCODE_CBIT:
 		brw_CBIT(p, dest, src0);
 		break;
-	case BRW_OPCODE_F32TO16:
-		brw_F32TO16(p, dest, src0);
-		break;
-	case BRW_OPCODE_F16TO32:
-		brw_F16TO32(p, dest, src0);
-		break;
 	case BRW_OPCODE_MOV:
 		brw_MOV(p, dest, src0);
 		break;
@@ -150,9 +144,6 @@ i965_asm_unary_instruction(int opcode, struct brw_codegen *p,
 	case BRW_OPCODE_LZD:
 		brw_LZD(p, dest, src0);
 		break;
-	case BRW_OPCODE_DIM:
-		brw_DIM(p, dest, src0);
-		break;
 	case BRW_OPCODE_RNDU:
 		fprintf(stderr, "Opcode BRW_OPCODE_RNDU unhandled\n");
 		break;
@@ -311,26 +302,12 @@ i965_asm_set_instruction_options(struct brw_codegen *p,
 	}
 	brw_inst_set_debug_control(p->devinfo, brw_last_inst,
 			           options.debug_control);
-	if (p->devinfo->ver >= 6)
-		brw_inst_set_acc_wr_control(p->devinfo, brw_last_inst,
-					    options.acc_wr_control);
+	brw_inst_set_acc_wr_control(p->devinfo, brw_last_inst,
+				    options.acc_wr_control);
 	brw_inst_set_cmpt_control(p->devinfo, brw_last_inst,
 				  options.compaction);
 }
 
-static void
-i965_asm_set_dst_nr(struct brw_codegen *p,
-	            struct brw_reg *reg,
-	            struct options options)
-{
-	if (p->devinfo->ver <= 6) {
-		if (reg->file == BRW_MESSAGE_REGISTER_FILE &&
-		    options.qtr_ctrl == BRW_COMPRESSION_COMPRESSED &&
-		    !options.is_compr)
-			reg->nr |= BRW_MRF_COMPR4;
-	}
-}
-
 static void
 add_label(struct brw_codegen *p, const char* label_name, enum instr_label_type type)
 {
@@ -401,10 +378,10 @@ add_label(struct brw_codegen *p, const char* label_name, enum instr_label_type t
 %token <integer> BFE BFI1 BFI2 BFB BFREV BRC BRD BREAK
 %token <integer> CALL CALLA CASE CBIT CMP CMPN CONT CSEL
 %token <integer> DIM DO DPAS DPASW DP2 DP3 DP4 DP4A DPH
-%token <integer> ELSE ENDIF F16TO32 F32TO16 FBH FBL FORK FRC
+%token <integer> ELSE ENDIF FBH FBL FORK FRC
 %token <integer> GOTO
 %token <integer> HALT
-%token <integer> IF IFF ILLEGAL
+%token <integer> IF ILLEGAL
 %token <integer> JMPI JOIN
 %token <integer> LINE LRP LZD
 %token <integer> MAC MACH MAD MADM MOV MOVI MUL MREST MSAVE
@@ -447,9 +424,6 @@ add_label(struct brw_codegen *p, const char* label_name, enum instr_label_type t
 /* compaction control */
 %token CMPTCTRL
 
-/* compression control */
-%token COMPR COMPR4 SECHALF
-
 /* mask control (WeCtrl) */
 %token WECTRL
 
@@ -486,13 +460,13 @@ add_label(struct brw_codegen *p, const char* label_name, enum instr_label_type t
 %token <integer> X Y Z W
 
 /* reg files */
-%token GENREGFILE MSGREGFILE
+%token GENREGFILE
 
 /* vertical stride in register region */
 %token VxH
 
 /* register type */
-%token <integer> GENREG MSGREG ADDRREG ACCREG FLAGREG NOTIFYREG STATEREG
+%token <integer> GENREG ADDRREG ACCREG FLAGREG NOTIFYREG STATEREG
 %token <integer> CONTROLREG IPREG PERFORMANCEREG THREADREG CHANNELENABLEREG
 %token <integer> MASKREG
 
@@ -506,7 +480,7 @@ add_label(struct brw_codegen *p, const char* label_name, enum instr_label_type t
 %nonassoc EMPTYEXECSIZE
 %nonassoc LPAREN
 
-%type <integer> execsize simple_int exp
+%type <integer> execsize exp
 %type <llint> exp2
 
 /* predicate control */
@@ -529,7 +503,7 @@ add_label(struct brw_codegen *p, const char* label_name, enum instr_label_type t
 %type <reg> dst dstoperand dstoperandex dstoperandex_typed dstreg
 %type <integer> dstregion
 
-%type <integer> saturate relativelocation rellocation
+%type <integer> saturate
 %type <reg> relativelocation2
 
 /* src operand */
@@ -537,7 +511,7 @@ add_label(struct brw_codegen *p, const char* label_name, enum instr_label_type t
 %type <reg> srcarcoperandex srcaccimm srcarcoperandex_typed srcimm
 %type <reg> indirectgenreg indirectregion
 %type <reg> immreg src reg32 payload directgenreg_list addrparam region
-%type <reg> region_wh directgenreg directmsgreg indirectmsgreg
+%type <reg> region_wh directgenreg
 %type <reg> desc ex_desc reg32a
 %type <integer> swizzle
 
@@ -596,16 +570,6 @@ add_instruction_option(struct options *options, struct instoption opt)
 	case ALIGN16:
 		options->access_mode = BRW_ALIGN_16;
 		break;
-	case SECHALF:
-		options->qtr_ctrl |= BRW_COMPRESSION_2NDHALF;
-		break;
-	case COMPR:
-		options->qtr_ctrl |= BRW_COMPRESSION_COMPRESSED;
-		options->is_compr = true;
-		break;
-	case COMPR4:
-		options->qtr_ctrl |= BRW_COMPRESSION_COMPRESSED;
-		break;
 	case SWITCH:
 		options->thread_control |= BRW_THREAD_SWITCH;
 		break;
@@ -728,7 +692,6 @@ illegalinstruction:
 unaryinstruction:
 	predicate unaryopcodes saturate cond_mod execsize dst srcaccimm	instoptions
 	{
-		i965_asm_set_dst_nr(p, &$6, $8);
 		brw_set_default_access_mode(p, $8.access_mode);
 		i965_asm_unary_instruction($2, p, $6, $7);
 		brw_pop_insn_state(p);
@@ -736,8 +699,7 @@ unaryinstruction:
 		brw_inst_set_cond_modifier(p->devinfo, brw_last_inst,
 					   $4.cond_modifier);
 
-		if (p->devinfo->ver >= 7 && $2 != BRW_OPCODE_DIM &&
-		    !brw_inst_flag_reg_nr(p->devinfo, brw_last_inst)) {
+		if (!brw_inst_flag_reg_nr(p->devinfo, brw_last_inst)) {
 			brw_inst_set_flag_reg_nr(p->devinfo,
 						 brw_last_inst,
 						 $4.flag_reg_nr);
@@ -756,9 +718,8 @@ unaryinstruction:
 		brw_inst_set_qtr_control(p->devinfo, brw_last_inst,
 				         $8.qtr_ctrl);
 
-		if (p->devinfo->ver >= 7)
-			brw_inst_set_nib_control(p->devinfo, brw_last_inst,
-					         $8.nib_ctrl);
+		brw_inst_set_nib_control(p->devinfo, brw_last_inst,
+				         $8.nib_ctrl);
 	}
 	;
 
@@ -766,8 +727,6 @@ unaryopcodes:
 	BFREV
 	| CBIT
 	| DIM
-	| F16TO32
-	| F32TO16
 	| FBH
 	| FBL
 	| FRC
@@ -784,15 +743,13 @@ unaryopcodes:
 binaryinstruction:
 	predicate binaryopcodes saturate cond_mod execsize dst srcimm srcimm instoptions
 	{
-		i965_asm_set_dst_nr(p, &$6, $9);
 		brw_set_default_access_mode(p, $9.access_mode);
 		i965_asm_binary_instruction($2, p, $6, $7, $8);
 		i965_asm_set_instruction_options(p, $9);
 		brw_inst_set_cond_modifier(p->devinfo, brw_last_inst,
 					   $4.cond_modifier);
 
-		if (p->devinfo->ver >= 7 &&
-		    !brw_inst_flag_reg_nr(p->devinfo, brw_last_inst)) {
+		if (!brw_inst_flag_reg_nr(p->devinfo, brw_last_inst)) {
 			brw_inst_set_flag_reg_nr(p->devinfo, brw_last_inst,
 					         $4.flag_reg_nr);
 			brw_inst_set_flag_subreg_nr(p->devinfo, brw_last_inst,
@@ -805,9 +762,8 @@ binaryinstruction:
 		brw_inst_set_qtr_control(p->devinfo, brw_last_inst,
 				         $9.qtr_ctrl);
 
-		if (p->devinfo->ver >= 7)
-			brw_inst_set_nib_control(p->devinfo, brw_last_inst,
-					         $9.nib_ctrl);
+		brw_inst_set_nib_control(p->devinfo, brw_last_inst,
+				         $9.nib_ctrl);
 
 		brw_pop_insn_state(p);
 	}
@@ -836,7 +792,6 @@ binaryopcodes:
 binaryaccinstruction:
 	predicate binaryaccopcodes saturate cond_mod execsize dst srcacc srcimm instoptions
 	{
-		i965_asm_set_dst_nr(p, &$6, $9);
 		brw_set_default_access_mode(p, $9.access_mode);
 		i965_asm_binary_instruction($2, p, $6, $7, $8);
 		brw_pop_insn_state(p);
@@ -844,8 +799,7 @@ binaryaccinstruction:
 		brw_inst_set_cond_modifier(p->devinfo, brw_last_inst,
 					   $4.cond_modifier);
 
-		if (p->devinfo->ver >= 7 &&
-		    !brw_inst_flag_reg_nr(p->devinfo, brw_last_inst)) {
+		if (!brw_inst_flag_reg_nr(p->devinfo, brw_last_inst)) {
 			brw_inst_set_flag_reg_nr(p->devinfo,
 						 brw_last_inst,
 						 $4.flag_reg_nr);
@@ -860,9 +814,8 @@ binaryaccinstruction:
 		brw_inst_set_qtr_control(p->devinfo, brw_last_inst,
 				         $9.qtr_ctrl);
 
-		if (p->devinfo->ver >= 7)
-			brw_inst_set_nib_control(p->devinfo, brw_last_inst,
-					         $9.nib_ctrl);
+		brw_inst_set_nib_control(p->devinfo, brw_last_inst,
+				         $9.nib_ctrl);
 	}
 	;
 
@@ -893,9 +846,8 @@ mathinstruction:
 		brw_inst_set_qtr_control(p->devinfo, brw_last_inst,
 				         $9.qtr_ctrl);
 
-		if (p->devinfo->ver >= 7)
-			brw_inst_set_nib_control(p->devinfo, brw_last_inst,
-					         $9.nib_ctrl);
+		brw_inst_set_nib_control(p->devinfo, brw_last_inst,
+				         $9.nib_ctrl);
 
 		brw_pop_insn_state(p);
 	}
@@ -938,7 +890,7 @@ ternaryinstruction:
 		brw_inst_set_cond_modifier(p->devinfo, brw_last_inst,
 					   $4.cond_modifier);
 
-		if (p->devinfo->ver >= 7 && p->devinfo->ver < 12) {
+		if (p->devinfo->ver < 12) {
 			brw_inst_set_3src_a16_flag_reg_nr(p->devinfo, brw_last_inst,
 					         $4.flag_reg_nr);
 			brw_inst_set_3src_a16_flag_subreg_nr(p->devinfo, brw_last_inst,
@@ -951,9 +903,8 @@ ternaryinstruction:
 		brw_inst_set_qtr_control(p->devinfo, brw_last_inst,
 				         $10.qtr_ctrl);
 
-		if (p->devinfo->ver >= 7)
-			brw_inst_set_nib_control(p->devinfo, brw_last_inst,
-					         $10.nib_ctrl);
+		brw_inst_set_nib_control(p->devinfo, brw_last_inst,
+				         $10.nib_ctrl);
 	}
 	;
 
@@ -1004,36 +955,14 @@ sendinstruction:
 		brw_inst_set_qtr_control(p->devinfo, brw_last_inst,
 				         $9.qtr_ctrl);
 
-		if (p->devinfo->ver >= 7)
-			brw_inst_set_nib_control(p->devinfo, brw_last_inst,
-					         $9.nib_ctrl);
-
-		brw_pop_insn_state(p);
-	}
-	| predicate sendopcode execsize exp dst payload exp2 sharedfunction msgdesc instoptions
-	{
-		assert(p->devinfo->ver < 6);
-
-		i965_asm_set_instruction_options(p, $10);
-		brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
-		brw_inst_set_base_mrf(p->devinfo, brw_last_inst, $4);
-		brw_set_dest(p, brw_last_inst, $5);
-		brw_set_src0(p, brw_last_inst, $6);
-		brw_inst_set_bits(brw_last_inst, 127, 96, $7);
-		brw_inst_set_src1_file_type(p->devinfo, brw_last_inst,
-				            BRW_IMMEDIATE_VALUE,
-					    BRW_REGISTER_TYPE_UD);
-		brw_inst_set_sfid(p->devinfo, brw_last_inst, $8);
-		brw_inst_set_eot(p->devinfo, brw_last_inst, $10.end_of_thread);
-		// TODO: set instruction group instead of qtr and nib ctrl
-		brw_inst_set_qtr_control(p->devinfo, brw_last_inst,
-				         $10.qtr_ctrl);
+		brw_inst_set_nib_control(p->devinfo, brw_last_inst,
+				         $9.nib_ctrl);
 
 		brw_pop_insn_state(p);
 	}
 	| predicate sendopcode execsize dst payload payload exp2 sharedfunction msgdesc instoptions
 	{
-		assert(p->devinfo->ver >= 6 && p->devinfo->ver < 12);
+		assert(p->devinfo->ver < 12);
 
 		i965_asm_set_instruction_options(p, $10);
 		brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
@@ -1046,16 +975,13 @@ sendinstruction:
 		brw_inst_set_qtr_control(p->devinfo, brw_last_inst,
 				         $10.qtr_ctrl);
 
-		if (p->devinfo->ver >= 7)
-			brw_inst_set_nib_control(p->devinfo, brw_last_inst,
-					         $10.nib_ctrl);
+		brw_inst_set_nib_control(p->devinfo, brw_last_inst,
+				         $10.nib_ctrl);
 
 		brw_pop_insn_state(p);
 	}
 	| predicate sendsopcode execsize dst payload payload desc ex_desc sharedfunction msgdesc instoptions
 	{
-		assert(p->devinfo->ver >= 9);
-
 		i965_asm_set_instruction_options(p, $11);
 		brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
 		brw_set_dest(p, brw_last_inst, $4);
@@ -1196,39 +1122,7 @@ branchinstruction:
 		i965_asm_set_instruction_options(p, $5);
 		brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
 
-		if (p->devinfo->ver == 6) {
-			brw_set_dest(p, brw_last_inst, brw_imm_w(0x0));
-			brw_set_src0(p, brw_last_inst, retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D));
-			brw_set_src1(p, brw_last_inst, retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D));
-		} else if (p->devinfo->ver == 7) {
-			brw_set_dest(p, brw_last_inst, retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D));
-			brw_set_src0(p, brw_last_inst, retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D));
-			brw_set_src1(p, brw_last_inst, brw_imm_w(0x0));
-		} else {
-			brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
-		}
-
-		brw_pop_insn_state(p);
-	}
-	| predicate ENDIF execsize relativelocation instoptions
-	{
-		brw_next_insn(p, $2);
-		i965_asm_set_instruction_options(p, $5);
-		brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
-
-		brw_set_dest(p, brw_last_inst, retype(brw_null_reg(),
-					BRW_REGISTER_TYPE_D));
-		brw_set_src0(p, brw_last_inst, retype(brw_null_reg(),
-					BRW_REGISTER_TYPE_D));
-		brw_set_src1(p, brw_last_inst, brw_imm_d(0x0));
-		brw_inst_set_gfx4_pop_count(p->devinfo, brw_last_inst, $4);
-
-		brw_inst_set_thread_control(p->devinfo, brw_last_inst,
-						BRW_THREAD_SWITCH);
+		brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
 
 		brw_pop_insn_state(p);
 	}
@@ -1241,40 +1135,10 @@ branchinstruction:
 		i965_asm_set_instruction_options(p, $5);
 		brw_inst_set_exec_size(p->devinfo, brw_last_inst, $2);
 
-		if (p->devinfo->ver == 6) {
-			brw_set_dest(p, brw_last_inst, brw_imm_w(0x0));
-			brw_set_src0(p, brw_last_inst, retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D));
-			brw_set_src1(p, brw_last_inst, retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D));
-		} else if (p->devinfo->ver == 7) {
-			brw_set_dest(p, brw_last_inst, retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D));
-			brw_set_src0(p, brw_last_inst, retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D));
-			brw_set_src1(p, brw_last_inst, brw_imm_w(0));
-		} else {
-			brw_set_dest(p, brw_last_inst, retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D));
-			if (p->devinfo->ver < 12)
-				brw_set_src0(p, brw_last_inst, brw_imm_d(0));
-		}
-	}
-	| ELSE execsize relativelocation rellocation instoptions
-	{
-		brw_next_insn(p, $1);
-		i965_asm_set_instruction_options(p, $5);
-		brw_inst_set_exec_size(p->devinfo, brw_last_inst, $2);
-
-		brw_set_dest(p, brw_last_inst, brw_ip_reg());
-		brw_set_src0(p, brw_last_inst, brw_ip_reg());
-		brw_set_src1(p, brw_last_inst, brw_imm_d(0x0));
-		brw_inst_set_gfx4_jump_count(p->devinfo, brw_last_inst, $3);
-		brw_inst_set_gfx4_pop_count(p->devinfo, brw_last_inst, $4);
-
-		if (!p->single_program_flow)
-			brw_inst_set_thread_control(p->devinfo, brw_last_inst,
-						    BRW_THREAD_SWITCH);
+		brw_set_dest(p, brw_last_inst, retype(brw_null_reg(),
+			     BRW_REGISTER_TYPE_D));
+		if (p->devinfo->ver < 12)
+			brw_set_src0(p, brw_last_inst, brw_imm_d(0));
 	}
 	| predicate IF execsize JUMP_LABEL jumplabel instoptions
 	{
@@ -1285,97 +1149,11 @@ branchinstruction:
 		i965_asm_set_instruction_options(p, $6);
 		brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
 
-		if (p->devinfo->ver == 6) {
-			brw_set_dest(p, brw_last_inst, brw_imm_w(0x0));
-			brw_set_src0(p, brw_last_inst,
-				     vec1(retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D)));
-			brw_set_src1(p, brw_last_inst,
-				     vec1(retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D)));
-		} else if (p->devinfo->ver == 7) {
-			brw_set_dest(p, brw_last_inst,
-				     vec1(retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D)));
-			brw_set_src0(p, brw_last_inst,
-				     vec1(retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D)));
-			brw_set_src1(p, brw_last_inst, brw_imm_w(0x0));
-		} else {
-			brw_set_dest(p, brw_last_inst,
-				     vec1(retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D)));
-			if (p->devinfo->ver < 12)
-				brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
-		}
-
-		brw_pop_insn_state(p);
-	}
-	| predicate IF execsize relativelocation rellocation instoptions
-	{
-		brw_next_insn(p, $2);
-		i965_asm_set_instruction_options(p, $6);
-		brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
-
-		brw_set_dest(p, brw_last_inst, brw_ip_reg());
-		brw_set_src0(p, brw_last_inst, brw_ip_reg());
-		brw_set_src1(p, brw_last_inst, brw_imm_d(0x0));
-		brw_inst_set_gfx4_jump_count(p->devinfo, brw_last_inst, $4);
-		brw_inst_set_gfx4_pop_count(p->devinfo, brw_last_inst, $5);
-
-		if (!p->single_program_flow)
-			brw_inst_set_thread_control(p->devinfo, brw_last_inst,
-						    BRW_THREAD_SWITCH);
-
-		brw_pop_insn_state(p);
-	}
-	| predicate IFF execsize JUMP_LABEL instoptions
-	{
-		add_label(p, $4, INSTR_LABEL_JIP);
-
-		brw_next_insn(p, $2);
-		i965_asm_set_instruction_options(p, $5);
-		brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
-
-		if (p->devinfo->ver == 6) {
-			brw_set_src0(p, brw_last_inst,
-				     vec1(retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D)));
-			brw_set_src1(p, brw_last_inst,
-				     vec1(retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D)));
-		} else if (p->devinfo->ver == 7) {
-			brw_set_dest(p, brw_last_inst,
-				     vec1(retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D)));
-			brw_set_src0(p, brw_last_inst,
-				     vec1(retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D)));
-			brw_set_src1(p, brw_last_inst, brw_imm_w(0x0));
-		} else {
-			brw_set_dest(p, brw_last_inst,
-				     vec1(retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D)));
-			if (p->devinfo->ver < 12)
-				brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
-		}
-
-		brw_pop_insn_state(p);
-	}
-	| predicate IFF execsize relativelocation instoptions
-	{
-		brw_next_insn(p, $2);
-		i965_asm_set_instruction_options(p, $5);
-		brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
-
-		brw_set_dest(p, brw_last_inst, brw_ip_reg());
-		brw_set_src0(p, brw_last_inst, brw_ip_reg());
-		brw_inst_set_gfx4_jump_count(p->devinfo, brw_last_inst, $4);
-		brw_set_src1(p, brw_last_inst, brw_imm_d($4));
-
-		if (!p->single_program_flow)
-			brw_inst_set_thread_control(p->devinfo, brw_last_inst,
-						    BRW_THREAD_SWITCH);
+		brw_set_dest(p, brw_last_inst,
+			     vec1(retype(brw_null_reg(),
+			     BRW_REGISTER_TYPE_D)));
+		if (p->devinfo->ver < 12)
+			brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
 
 		brw_pop_insn_state(p);
 	}
@@ -1392,31 +1170,9 @@ breakinstruction:
 		i965_asm_set_instruction_options(p, $6);
 		brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
 
-		if (p->devinfo->ver >= 8) {
-			brw_set_dest(p, brw_last_inst, retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D));
-			brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
-		} else {
-			brw_set_dest(p, brw_last_inst, retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D));
-			brw_set_src0(p, brw_last_inst, retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D));
-			brw_set_src1(p, brw_last_inst, brw_imm_d(0x0));
-		}
-
-		brw_pop_insn_state(p);
-	}
-	| predicate BREAK execsize relativelocation relativelocation instoptions
-	{
-		brw_next_insn(p, $2);
-		i965_asm_set_instruction_options(p, $6);
-		brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
-
-		brw_set_dest(p, brw_last_inst, brw_ip_reg());
-		brw_set_src0(p, brw_last_inst, brw_ip_reg());
-		brw_set_src1(p, brw_last_inst, brw_imm_d(0x0));
-		brw_inst_set_gfx4_jump_count(p->devinfo, brw_last_inst, $4);
-		brw_inst_set_gfx4_pop_count(p->devinfo, brw_last_inst, $5);
+		brw_set_dest(p, brw_last_inst, retype(brw_null_reg(),
+			     BRW_REGISTER_TYPE_D));
+		brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
 
 		brw_pop_insn_state(p);
 	}
@@ -1432,11 +1188,7 @@ breakinstruction:
 		brw_set_dest(p, brw_last_inst, retype(brw_null_reg(),
 			     BRW_REGISTER_TYPE_D));
 
-		if (p->devinfo->ver < 8) {
-			brw_set_src0(p, brw_last_inst, retype(brw_null_reg(),
-				     BRW_REGISTER_TYPE_D));
-			brw_set_src1(p, brw_last_inst, brw_imm_d(0x0));
-		} else if (p->devinfo->ver < 12) {
+		if (p->devinfo->ver < 12) {
 			brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
 		}
 
@@ -1452,27 +1204,7 @@ breakinstruction:
 		brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
 		brw_set_dest(p, brw_last_inst, brw_ip_reg());
 
-		if (p->devinfo->ver >= 8) {
-			brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
-		} else {
-			brw_set_src0(p, brw_last_inst, brw_ip_reg());
-			brw_set_src1(p, brw_last_inst, brw_imm_d(0x0));
-		}
-
-		brw_pop_insn_state(p);
-	}
-	| predicate CONT execsize relativelocation relativelocation instoptions
-	{
-		brw_next_insn(p, $2);
-		i965_asm_set_instruction_options(p, $6);
-		brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
-		brw_set_dest(p, brw_last_inst, brw_ip_reg());
-
-		brw_set_src0(p, brw_last_inst, brw_ip_reg());
-		brw_set_src1(p, brw_last_inst, brw_imm_d(0x0));
-
-		brw_inst_set_gfx4_jump_count(p->devinfo, brw_last_inst, $4);
-		brw_inst_set_gfx4_pop_count(p->devinfo, brw_last_inst, $5);
+		brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
 
 		brw_pop_insn_state(p);
 	}
@@ -1488,59 +1220,17 @@ loopinstruction:
 		i965_asm_set_instruction_options(p, $5);
 		brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
 
-		if (p->devinfo->ver >= 8) {
-			brw_set_dest(p, brw_last_inst,
-						retype(brw_null_reg(),
-						BRW_REGISTER_TYPE_D));
-			if (p->devinfo->ver < 12)
-				brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
-		} else if (p->devinfo->ver == 7) {
-			brw_set_dest(p, brw_last_inst,
-						retype(brw_null_reg(),
-						BRW_REGISTER_TYPE_D));
-			brw_set_src0(p, brw_last_inst,
-						retype(brw_null_reg(),
-						BRW_REGISTER_TYPE_D));
-			brw_set_src1(p, brw_last_inst,
-						brw_imm_w(0x0));
-		} else {
-			brw_set_dest(p, brw_last_inst, brw_imm_w(0x0));
-			brw_set_src0(p, brw_last_inst,
-						retype(brw_null_reg(),
-						BRW_REGISTER_TYPE_D));
-			brw_set_src1(p, brw_last_inst,
-						retype(brw_null_reg(),
-						BRW_REGISTER_TYPE_D));
-		}
-
-		brw_pop_insn_state(p);
-	}
-	| predicate WHILE execsize relativelocation instoptions
-	{
-		brw_next_insn(p, $2);
-		i965_asm_set_instruction_options(p, $5);
-		brw_inst_set_exec_size(p->devinfo, brw_last_inst, $3);
-
-		brw_set_dest(p, brw_last_inst, brw_ip_reg());
-		brw_set_src0(p, brw_last_inst, brw_ip_reg());
-		brw_set_src1(p, brw_last_inst, brw_imm_d(0x0));
-		brw_inst_set_gfx4_jump_count(p->devinfo, brw_last_inst, $4);
-		brw_inst_set_gfx4_pop_count(p->devinfo, brw_last_inst, 0);
+		brw_set_dest(p, brw_last_inst,
+					retype(brw_null_reg(),
+					BRW_REGISTER_TYPE_D));
+		if (p->devinfo->ver < 12)
+			brw_set_src0(p, brw_last_inst, brw_imm_d(0x0));
 
 		brw_pop_insn_state(p);
 	}
 	| DO execsize instoptions
 	{
 		brw_next_insn(p, $1);
-		if (p->devinfo->ver < 6) {
-			brw_inst_set_exec_size(p->devinfo, brw_last_inst, $2);
-			i965_asm_set_instruction_options(p, $3);
-			brw_set_dest(p, brw_last_inst, brw_null_reg());
-			brw_set_src0(p, brw_last_inst, brw_null_reg());
-			brw_set_src1(p, brw_last_inst, brw_null_reg());
-
-			brw_inst_set_qtr_control(p->devinfo, brw_last_inst, BRW_COMPRESSION_NONE);
-		}
 	}
 	;
 
@@ -1598,25 +1288,6 @@ relativelocation2:
 	| reg32
 	;
 
-simple_int:
-	INTEGER 	        { $$ = $1; }
-	| MINUS INTEGER 	{ $$ = -$2; }
-	| LONG 		        { $$ = $1; }
-	| MINUS LONG 	        { $$ = -$2; }
-	;
-
-rellocation:
-	relativelocation
-	| /* empty */ { $$ = 0; }
-	;
-
-relativelocation:
-	simple_int
-	{
-		$$ = $1;
-	}
-	;
-
 jumplabel:
 	JUMP_LABEL	{ $$ = $1; }
 	| /* empty */	{ $$ = NULL; }
@@ -1708,16 +1379,6 @@ dstreg:
 		$$ = $1;
 		$$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER;
 	}
-	| directmsgreg
-	{
-		$$ = $1;
-		$$.address_mode = BRW_ADDRESS_DIRECT;
-	}
-	| indirectmsgreg
-	{
-		$$ = $1;
-		$$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER;
-	}
 	;
 
 /* Source register */
@@ -1878,7 +1539,6 @@ indirectsrcoperand:
 
 directgenreg_list:
 	directgenreg
-	| directmsgreg
 	| notifyreg
 	| addrreg
 	| performancereg
@@ -1944,29 +1604,10 @@ indirectgenreg:
 	}
 	;
 
-directmsgreg:
-	MSGREG subregnum
-	{
-		$$.file = BRW_MESSAGE_REGISTER_FILE;
-		$$.nr = $1;
-		$$.subnr = $2;
-	}
-	;
-
-indirectmsgreg:
-	MSGREGFILE LSQUARE addrparam RSQUARE
-	{
-		memset(&$$, '\0', sizeof($$));
-		$$.file = BRW_MESSAGE_REGISTER_FILE;
-		$$.subnr = $3.subnr;
-		$$.indirect_offset = $3.indirect_offset;
-	}
-	;
-
 addrreg:
 	ADDRREG subregnum
 	{
-		int subnr = (p->devinfo->ver >= 8) ? 16 : 8;
+		int subnr = 16;
 
 		if ($2 > subnr)
 			error(&@2, "Address sub register number %d"
@@ -1981,11 +1622,7 @@ addrreg:
 accreg:
 	ACCREG subregnum
 	{
-		int nr_reg;
-		if (p->devinfo->ver < 8)
-			nr_reg = 2;
-		else
-			nr_reg = 10;
+		int nr_reg = 10;
 
 		if ($1 > nr_reg)
 			error(&@1, "Accumulator register number %d"
@@ -2001,8 +1638,8 @@ accreg:
 flagreg:
 	FLAGREG subregnum
 	{
-		// SNB = 1 flag reg and IVB+ = 2 flag reg
-		int nr_reg = (p->devinfo->ver >= 7) ? 2 : 1;
+		// 2 flag reg
+		int nr_reg = 2;
 		int subnr = nr_reg;
 
 		if ($1 > nr_reg)
@@ -2102,8 +1739,6 @@ performancereg:
 		int subnr;
 		if (p->devinfo->ver >= 10)
 			subnr = 5;
-		else if (p->devinfo->ver <= 8)
-			subnr = 3;
 		else
 			subnr = 4;
 
@@ -2522,9 +2157,6 @@ instoption:
 	ALIGN1 	        { $$.type = INSTOPTION_FLAG; $$.uint_value = ALIGN1;}
 	| ALIGN16 	{ $$.type = INSTOPTION_FLAG; $$.uint_value = ALIGN16; }
 	| ACCWREN 	{ $$.type = INSTOPTION_FLAG; $$.uint_value = ACCWREN; }
-	| SECHALF 	{ $$.type = INSTOPTION_FLAG; $$.uint_value = SECHALF; }
-	| COMPR 	{ $$.type = INSTOPTION_FLAG; $$.uint_value = COMPR; }
-	| COMPR4 	{ $$.type = INSTOPTION_FLAG; $$.uint_value = COMPR4; }
 	| BREAKPOINT 	{ $$.type = INSTOPTION_FLAG; $$.uint_value = BREAKPOINT; }
 	| NODDCLR 	{ $$.type = INSTOPTION_FLAG; $$.uint_value = NODDCLR; }
 	| NODDCHK 	{ $$.type = INSTOPTION_FLAG; $$.uint_value = NODDCHK; }
diff --git a/src/intel/compiler/brw_lex.l b/src/intel/compiler/brw_lex.l
index d230d997358..3fd8eb8ec48 100644
--- a/src/intel/compiler/brw_lex.l
+++ b/src/intel/compiler/brw_lex.l
@@ -66,13 +66,11 @@ brd 		{ yylval.integer = BRW_OPCODE_BRD; return BRD; }
 break 		{ yylval.integer = BRW_OPCODE_BREAK; return BREAK; }
 call 		{ yylval.integer = BRW_OPCODE_CALL; return CALL; }
 calla 		{ yylval.integer = BRW_OPCODE_CALLA; return CALLA; }
-case 		{ yylval.integer = BRW_OPCODE_CASE; return CASE; }
 cbit 		{ yylval.integer = BRW_OPCODE_CBIT; return CBIT; }
 cmp 		{ yylval.integer = BRW_OPCODE_CMP; return CMP; }
 cmpn 		{ yylval.integer = BRW_OPCODE_CMPN; return CMPN; }
 cont 		{ yylval.integer = BRW_OPCODE_CONTINUE; return CONT; }
 csel 		{ yylval.integer = BRW_OPCODE_CSEL; return CSEL; }
-dim 		{ yylval.integer = BRW_OPCODE_DIM; return DIM; }
 do 		{ yylval.integer = BRW_OPCODE_DO; return DO; }
 dp2 		{ yylval.integer = BRW_OPCODE_DP2; return DP2; }
 dp3 		{ yylval.integer = BRW_OPCODE_DP3; return DP3; }
@@ -81,16 +79,12 @@ dp4a		{ yylval.integer = BRW_OPCODE_DP4A; return DP4A; }
 dph 		{ yylval.integer = BRW_OPCODE_DPH; return DPH; }
 else 		{ yylval.integer = BRW_OPCODE_ELSE; return ELSE; }
 endif 		{ yylval.integer = BRW_OPCODE_ENDIF; return ENDIF; }
-f16to32 	{ yylval.integer = BRW_OPCODE_F16TO32; return F16TO32; }
-f32to16 	{ yylval.integer = BRW_OPCODE_F32TO16; return F32TO16; }
 fbh 		{ yylval.integer = BRW_OPCODE_FBH; return FBH; }
 fbl 		{ yylval.integer = BRW_OPCODE_FBL; return FBL; }
-fork 		{ yylval.integer = BRW_OPCODE_FORK; return FORK; }
 frc 		{ yylval.integer = BRW_OPCODE_FRC; return FRC; }
 goto 		{ yylval.integer = BRW_OPCODE_GOTO; return GOTO; }
 halt 		{ yylval.integer = BRW_OPCODE_HALT; return HALT; }
 if 		{ yylval.integer = BRW_OPCODE_IF; return IF; }
-iff 		{ yylval.integer = BRW_OPCODE_IFF; return IFF; }
 illegal 	{ yylval.integer = BRW_OPCODE_ILLEGAL; return ILLEGAL; }
 jmpi 		{ yylval.integer = BRW_OPCODE_JMPI; return JMPI; }
 line 		{ yylval.integer = BRW_OPCODE_LINE; return LINE; }
@@ -103,15 +97,10 @@ madm 		{ yylval.integer = BRW_OPCODE_MADM; return MADM; }
 mov 		{ yylval.integer = BRW_OPCODE_MOV; return MOV; }
 movi 		{ yylval.integer = BRW_OPCODE_MOVI; return MOVI; }
 mul 		{ yylval.integer = BRW_OPCODE_MUL; return MUL; }
-mrest 		{ yylval.integer = BRW_OPCODE_MREST; return MREST; }
-msave 		{ yylval.integer = BRW_OPCODE_MSAVE; return MSAVE; }
-nenop 		{ yylval.integer = BRW_OPCODE_NENOP; return NENOP; }
 nop 		{ yylval.integer = BRW_OPCODE_NOP; return NOP; }
 not 		{ yylval.integer = BRW_OPCODE_NOT; return NOT; }
 or 		{ yylval.integer = BRW_OPCODE_OR; return OR; }
 pln 		{ yylval.integer = BRW_OPCODE_PLN; return PLN; }
-pop 		{ yylval.integer = BRW_OPCODE_POP; return POP; }
-push 		{ yylval.integer = BRW_OPCODE_PUSH; return PUSH; }
 ret 		{ yylval.integer = BRW_OPCODE_RET; return RET; }
 rndd 		{ yylval.integer = BRW_OPCODE_RNDD; return RNDD; }
 rnde 		{ yylval.integer = BRW_OPCODE_RNDE; return RNDE; }
@@ -297,11 +286,6 @@ nomask      	{ return MASK_DISABLE; }
 atomic       	{ return ATOMIC; }
 switch       	{ return SWITCH; }
 
- /* compression control */
-compr 		{ return COMPR; }
-compr4    	{ return COMPR4; }
-sechalf 	{ return SECHALF; }
-
  /* Quarter Control */
 1[HNQ]       	{ }
 "2Q"	        { return QTR_2Q; }
@@ -348,10 +332,6 @@ sechalf 	{ return SECHALF; }
  /* flag registers */
 "f"[0|1] 	{ BEGIN(CHANNEL); yylval.integer = atoi(yytext + 1); return FLAGREG; }
 
- /* message control registers */
-"m" 		{ return MSGREGFILE; }
-m[0-9]+ 	{ yylval.integer = atoi(yytext + 1); BEGIN(REG); return MSGREG; }
-
  /* state register */
 sr[0-9]+ 	{ yylval.integer = atoi(yytext + 2); return STATEREG; }