brw, nir: Use glsl_base_type instead of nir_alu_type for @dpas_intel
This will allow including types that don't have a nir_alu_type equivalent, like bfloat16. Reviewed-by: Rohan Garg <rohan.garg@intel.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
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@@ -223,6 +223,11 @@ index("nir_alu_type", "src_type")
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# The nir_alu_type of the data output from a load or conversion
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index("nir_alu_type", "dest_type")
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# Source and destination data types for dpas_intel. Needed here to
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# represent types that won't have a nir_alu_type.
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index("enum glsl_base_type", "src_base_type")
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index("enum glsl_base_type", "dest_base_type")
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# The swizzle mask for quad_swizzle_amd & masked_swizzle_amd
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index("unsigned", "swizzle_mask")
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@@ -2421,7 +2426,7 @@ system_value("ray_query_global_intel", 1, bit_sizes=[64])
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# its value. Some supported configurations will have the component count of
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# that matrix different than the others.
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intrinsic("dpas_intel", dest_comp=0, src_comp=[0, -1, 0],
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indices=[DEST_TYPE, SRC_TYPE, SATURATE, SYSTOLIC_DEPTH, REPEAT_COUNT],
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indices=[DEST_BASE_TYPE, SRC_BASE_TYPE, SATURATE, SYSTOLIC_DEPTH, REPEAT_COUNT],
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flags=[CAN_ELIMINATE])
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# NVIDIA-specific intrinsics
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