From a2f96667e243719286a33302cbc2df0d6e8cbb69 Mon Sep 17 00:00:00 2001 From: "Eric R. Smith" Date: Sun, 27 Oct 2024 19:49:57 -0300 Subject: [PATCH] mesa: update more drivers to handle pipe_blit_info swizzle_enable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Handle swizzling by falling through to the software path. Swizzle should be rarely enabled, so this shouldn't affect performance in most cases. Reviewed-by: Marek Olšák Acked-by: Faith Ekstrand Part-of: --- src/broadcom/ci/broadcom-rpi4-fails.txt | 1 - src/broadcom/ci/broadcom-rpi5-fails.txt | 1 - src/gallium/auxiliary/util/u_surface.c | 3 ++- src/gallium/drivers/asahi/agx_blit.c | 2 ++ src/gallium/drivers/d3d12/d3d12_blit.cpp | 3 ++- src/gallium/drivers/etnaviv/etnaviv_blt.c | 1 + src/gallium/drivers/etnaviv/etnaviv_rs.c | 1 + src/gallium/drivers/freedreno/a5xx/fd5_blitter.c | 2 +- src/gallium/drivers/freedreno/a6xx/fd6_blitter.cc | 1 + src/gallium/drivers/freedreno/freedreno_blitter.c | 2 +- src/gallium/drivers/lima/lima_blit.c | 3 +++ src/gallium/drivers/r300/r300_blit.c | 1 + src/gallium/drivers/r600/r600_blit.c | 1 + src/gallium/drivers/radeonsi/si_blit.c | 1 + src/gallium/drivers/radeonsi/si_compute_blit.c | 1 + src/gallium/drivers/svga/svga_pipe_blit.c | 3 +++ src/gallium/drivers/vc4/vc4_blit.c | 4 +++- src/gallium/drivers/zink/ci/zink-radv-vangogh-fails.txt | 1 - src/gallium/drivers/zink/zink_blit.c | 2 ++ 19 files changed, 26 insertions(+), 8 deletions(-) diff --git a/src/broadcom/ci/broadcom-rpi4-fails.txt b/src/broadcom/ci/broadcom-rpi4-fails.txt index 64dd96b93b4..51ef5be10aa 100644 --- a/src/broadcom/ci/broadcom-rpi4-fails.txt +++ b/src/broadcom/ci/broadcom-rpi4-fails.txt @@ -192,7 +192,6 @@ spec@egl_khr_gl_image@egl_khr_gl_renderbuffer_image-clear-shared-image gl_depth_ spec@egl_khr_gl_image@egl_khr_gl_renderbuffer_image-clear-shared-image gl_rgba,Fail spec@egl_khr_surfaceless_context@viewport,Fail spec@egl_mesa_configless_context@basic,Fail -spec@ext_framebuffer_multisample@blit-mismatched-formats,Fail spec@ext_framebuffer_multisample@interpolation 2 centroid-edges,Fail spec@ext_framebuffer_multisample@interpolation 4 centroid-edges,Fail spec@ext_framebuffer_object@getteximage-formats init-by-clear-and-render,Fail diff --git a/src/broadcom/ci/broadcom-rpi5-fails.txt b/src/broadcom/ci/broadcom-rpi5-fails.txt index 04bfe6e66e0..0d1b7f70fda 100644 --- a/src/broadcom/ci/broadcom-rpi5-fails.txt +++ b/src/broadcom/ci/broadcom-rpi5-fails.txt @@ -178,7 +178,6 @@ spec@egl_khr_gl_image@egl_khr_gl_renderbuffer_image-clear-shared-image gl_depth_ spec@egl_khr_gl_image@egl_khr_gl_renderbuffer_image-clear-shared-image gl_rgba,Fail spec@egl_khr_surfaceless_context@viewport,Fail spec@egl_mesa_configless_context@basic,Fail -spec@ext_framebuffer_multisample@blit-mismatched-formats,Fail spec@ext_framebuffer_multisample@interpolation 2 centroid-edges,Fail spec@ext_framebuffer_multisample@interpolation 4 centroid-edges,Fail spec@ext_framebuffer_object@getteximage-formats init-by-clear-and-render,Fail diff --git a/src/gallium/auxiliary/util/u_surface.c b/src/gallium/auxiliary/util/u_surface.c index 49497799375..8a35923d1b5 100644 --- a/src/gallium/auxiliary/util/u_surface.c +++ b/src/gallium/auxiliary/util/u_surface.c @@ -914,10 +914,11 @@ util_can_blit_via_copy_region(const struct pipe_blit_info *blit, unsigned mask = util_format_get_mask(blit->dst.format); - /* No masks, no filtering, no scissor, no blending */ + /* No masks, no filtering, no scissor, no blending, no swizzle */ if ((blit->mask & mask) != mask || blit->filter != PIPE_TEX_FILTER_NEAREST || blit->scissor_enable || + blit->swizzle_enable || blit->num_window_rectangles > 0 || blit->alpha_blend || (blit->render_condition_enable && render_condition_bound)) { diff --git a/src/gallium/drivers/asahi/agx_blit.c b/src/gallium/drivers/asahi/agx_blit.c index 3404dd15c08..938247445e3 100644 --- a/src/gallium/drivers/asahi/agx_blit.c +++ b/src/gallium/drivers/asahi/agx_blit.c @@ -235,6 +235,7 @@ asahi_compute_blit_supported(const struct pipe_blit_info *info) return (info->src.box.depth == info->dst.box.depth) && !info->alpha_blend && !info->num_window_rectangles && !info->sample0_only && !info->scissor_enable && !info->window_rectangle_include && + !info->swizzle_enable && info->src.resource->nr_samples <= 1 && info->dst.resource->nr_samples <= 1 && !util_format_is_depth_and_stencil(info->src.format) && @@ -597,6 +598,7 @@ try_copy_via_blit(struct pipe_context *pctx, struct pipe_resource *dst, .mask = util_format_get_mask(src->format), .filter = PIPE_TEX_FILTER_NEAREST, .scissor_enable = 0, + .swizzle_enable = 0, }; /* snorm formats don't round trip, so don't use them for copies */ diff --git a/src/gallium/drivers/d3d12/d3d12_blit.cpp b/src/gallium/drivers/d3d12/d3d12_blit.cpp index 63d92aa11f4..89d044433bf 100644 --- a/src/gallium/drivers/d3d12/d3d12_blit.cpp +++ b/src/gallium/drivers/d3d12/d3d12_blit.cpp @@ -61,6 +61,7 @@ resolve_supported(const struct pipe_blit_info *info) if (info->filter != PIPE_TEX_FILTER_NEAREST || info->scissor_enable || + info->swizzle_enable || info->num_window_rectangles > 0 || info->alpha_blend) return false; @@ -162,7 +163,7 @@ direct_copy_supported(struct d3d12_screen *screen, const struct pipe_blit_info *info, bool have_predication) { - if (info->scissor_enable || info->alpha_blend || + if (info->scissor_enable || info->alpha_blend || info->swizzle_enable || (have_predication && info->render_condition_enable) || MAX2(info->src.resource->nr_samples, 1) != MAX2(info->dst.resource->nr_samples, 1)) { return false; diff --git a/src/gallium/drivers/etnaviv/etnaviv_blt.c b/src/gallium/drivers/etnaviv/etnaviv_blt.c index 18f171eeda6..d3b73f02254 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_blt.c +++ b/src/gallium/drivers/etnaviv/etnaviv_blt.c @@ -474,6 +474,7 @@ etna_try_blt_blit(struct pipe_context *pctx, return false; if (blit_info->scissor_enable || + blit_info->swizzle_enable || blit_info->dst.box.depth != blit_info->src.box.depth || blit_info->dst.box.depth != 1) { return false; diff --git a/src/gallium/drivers/etnaviv/etnaviv_rs.c b/src/gallium/drivers/etnaviv/etnaviv_rs.c index e20ec1d327f..ead7d6cb735 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_rs.c +++ b/src/gallium/drivers/etnaviv/etnaviv_rs.c @@ -683,6 +683,7 @@ etna_try_rs_blit(struct pipe_context *pctx, return false; if (blit_info->scissor_enable || + blit_info->swizzle_enable || blit_info->dst.box.depth != blit_info->src.box.depth || blit_info->dst.box.depth != 1) { return false; diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_blitter.c b/src/gallium/drivers/freedreno/a5xx/fd5_blitter.c index caf1b0ea041..6a3b0920705 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_blitter.c +++ b/src/gallium/drivers/freedreno/a5xx/fd5_blitter.c @@ -108,7 +108,7 @@ can_do_blit(const struct pipe_blit_info *info) (info->src.resource->nr_samples > 1)) return false; - if (info->scissor_enable) + if (info->scissor_enable || info->swizzle_enable) return false; if (info->window_rectangle_include) diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.cc b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.cc index 010327252e1..a771a643976 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.cc +++ b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.cc @@ -210,6 +210,7 @@ can_do_blit(const struct pipe_blit_info *info) /* The blitter can't handle the needed swizzle gymnastics to convert * to/from L/A formats: */ + fail_if(info->swizzle_enable); if (info->src.format != info->dst.format) { fail_if(util_format_is_luminance(info->dst.format)); fail_if(util_format_is_alpha(info->dst.format)); diff --git a/src/gallium/drivers/freedreno/freedreno_blitter.c b/src/gallium/drivers/freedreno/freedreno_blitter.c index a158639d2e4..5dc63fbfef6 100644 --- a/src/gallium/drivers/freedreno/freedreno_blitter.c +++ b/src/gallium/drivers/freedreno/freedreno_blitter.c @@ -439,7 +439,7 @@ fd_resource_copy_region(struct pipe_context *pctx, struct pipe_resource *dst, info.mask = util_format_get_mask(src->format); info.filter = PIPE_TEX_FILTER_NEAREST; info.scissor_enable = 0; - + info.swizzle_enable = 0; if (ctx->blit(ctx, &info)) return; } diff --git a/src/gallium/drivers/lima/lima_blit.c b/src/gallium/drivers/lima/lima_blit.c index 0da8ee71727..a0901d2afac 100644 --- a/src/gallium/drivers/lima/lima_blit.c +++ b/src/gallium/drivers/lima/lima_blit.c @@ -202,6 +202,9 @@ lima_do_blit(struct pipe_context *pctx, return false; /* Blitting of swizzled formats (R and RG) isn't implemented yet */ + if (info->swizzle_enable) + return false; + if (memcmp(identity, lima_format_get_texel_swizzle(info->src.resource->format), sizeof(identity))) diff --git a/src/gallium/drivers/r300/r300_blit.c b/src/gallium/drivers/r300/r300_blit.c index 8dd37865d43..dfcf3c16d9a 100644 --- a/src/gallium/drivers/r300/r300_blit.c +++ b/src/gallium/drivers/r300/r300_blit.c @@ -687,6 +687,7 @@ static bool r300_is_simple_msaa_resolve(const struct pipe_blit_info *info) info->dst.resource->format == info->dst.format && info->src.resource->format == info->src.format && !info->scissor_enable && + !info->swizzle_enable && info->mask == PIPE_MASK_RGBA && dst_width == info->src.resource->width0 && dst_height == info->src.resource->height0 && diff --git a/src/gallium/drivers/r600/r600_blit.c b/src/gallium/drivers/r600/r600_blit.c index 3694f608b1a..9bedf87c7b0 100644 --- a/src/gallium/drivers/r600/r600_blit.c +++ b/src/gallium/drivers/r600/r600_blit.c @@ -824,6 +824,7 @@ static bool do_hardware_msaa_resolve(struct pipe_context *ctx, util_is_format_compatible(util_format_description(info->src.format), util_format_description(info->dst.format)) && !info->scissor_enable && + !info->swizzle_enable && (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA && dst_width == info->src.resource->width0 && dst_height == info->src.resource->height0 && diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c index 656db4b6f93..0f1850019ce 100644 --- a/src/gallium/drivers/radeonsi/si_blit.c +++ b/src/gallium/drivers/radeonsi/si_blit.c @@ -1171,6 +1171,7 @@ bool si_msaa_resolve_blit_via_CB(struct pipe_context *ctx, const struct pipe_bli /* Check the remaining requirements for hw resolve. */ if (util_max_layer(info->dst.resource, info->dst.level) == 0 && !info->scissor_enable && + !info->swizzle_enable && (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA && resolve_formats_compatible(info->src.format, info->dst.format, src->swap_rgb_to_bgr, &need_rgb_to_bgr) && diff --git a/src/gallium/drivers/radeonsi/si_compute_blit.c b/src/gallium/drivers/radeonsi/si_compute_blit.c index 459b0fc94d4..8ba1faf0c38 100644 --- a/src/gallium/drivers/radeonsi/si_compute_blit.c +++ b/src/gallium/drivers/radeonsi/si_compute_blit.c @@ -746,6 +746,7 @@ bool si_compute_blit(struct si_context *sctx, const struct pipe_blit_info *info, if (info->dst_sample != 0 || info->alpha_blend || info->num_window_rectangles || + info->swizzle_enable || info->scissor_enable) return false; diff --git a/src/gallium/drivers/svga/svga_pipe_blit.c b/src/gallium/drivers/svga/svga_pipe_blit.c index 9f42b22668e..14f7ab48d7e 100644 --- a/src/gallium/drivers/svga/svga_pipe_blit.c +++ b/src/gallium/drivers/svga/svga_pipe_blit.c @@ -368,6 +368,9 @@ can_blit_via_copy_region_vgpu10(struct svga_context *svga, { struct svga_texture *dtex, *stex; + if (blit_info->swizzle_enable) + return false; + /* can't copy between different resource types */ if (svga_resource_type(blit_info->src.resource->target) != svga_resource_type(blit_info->dst.resource->target)) diff --git a/src/gallium/drivers/vc4/vc4_blit.c b/src/gallium/drivers/vc4/vc4_blit.c index da443ee4962..6e59ed97145 100644 --- a/src/gallium/drivers/vc4/vc4_blit.c +++ b/src/gallium/drivers/vc4/vc4_blit.c @@ -71,7 +71,7 @@ vc4_tile_blit(struct pipe_context *pctx, struct pipe_blit_info *info) assert ((is_color_blit && !(is_depth_blit || is_stencil_blit)) || (!is_color_blit && (is_depth_blit || is_stencil_blit))); - if (info->scissor_enable) + if (info->scissor_enable || info->swizzle_enable) return; if (info->dst.box.x != info->src.box.x || @@ -343,6 +343,8 @@ vc4_yuv_blit(struct pipe_context *pctx, struct pipe_blit_info *info) if (!(info->mask & PIPE_MASK_RGBA)) return; + if (info->swizzle_enable) + return; if (src->tiled) return; diff --git a/src/gallium/drivers/zink/ci/zink-radv-vangogh-fails.txt b/src/gallium/drivers/zink/ci/zink-radv-vangogh-fails.txt index ea94d9e8374..9b87599486a 100644 --- a/src/gallium/drivers/zink/ci/zink-radv-vangogh-fails.txt +++ b/src/gallium/drivers/zink/ci/zink-radv-vangogh-fails.txt @@ -31,7 +31,6 @@ spec@egl_chromium_sync_control@conformance@eglGetSyncValuesCHROMIUM_msc_and_sbc_ spec@egl_khr_gl_image@egl_khr_gl_renderbuffer_image-clear-shared-image gl_depth_component24,Fail spec@egl_khr_surfaceless_context@viewport,Fail -spec@ext_framebuffer_multisample@blit-mismatched-formats,Fail spec@ext_packed_float@query-rgba-signed-components,Fail spec@glsl-1.10@execution@glsl-fs-inline-explosion,Crash diff --git a/src/gallium/drivers/zink/zink_blit.c b/src/gallium/drivers/zink/zink_blit.c index a2632d5cdec..16b0f426215 100644 --- a/src/gallium/drivers/zink/zink_blit.c +++ b/src/gallium/drivers/zink/zink_blit.c @@ -31,6 +31,7 @@ blit_resolve(struct zink_context *ctx, const struct pipe_blit_info *info, bool * util_format_get_mask(info->src.format) != info->mask || util_format_is_depth_or_stencil(info->dst.format) || info->scissor_enable || + info->swizzle_enable || info->alpha_blend) return false; @@ -145,6 +146,7 @@ blit_native(struct zink_context *ctx, const struct pipe_blit_info *info, bool *n if (util_format_get_mask(info->dst.format) != info->mask || util_format_get_mask(info->src.format) != info->mask || info->scissor_enable || + info->swizzle_enable || info->alpha_blend) return false;