From a2e5e7daa0d6271d9950e268c4a36d38da899656 Mon Sep 17 00:00:00 2001 From: Mark Janes Date: Tue, 14 Mar 2023 15:02:40 -0700 Subject: [PATCH] intel: use generated helpers for Wa_1409433168/Wa_16011107343 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit HSD 1306463417 is a hardware defect. The originating software workaround for the issue is Wa_1409433168. Convert all references to the software workaround number, and use generated helpers instead of GFX comparisons. Reviewed-by: Tapani Pälli Part-of: --- src/gallium/drivers/iris/iris_state.c | 4 ++-- src/intel/vulkan/genX_cmd_buffer.c | 29 +++++++++++++-------------- 2 files changed, 16 insertions(+), 17 deletions(-) diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 31b5eb621bf..f4b2790eb2c 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -7214,11 +7214,11 @@ iris_upload_render_state(struct iris_context *ice, batch->contains_draw_with_next_seqno = true; } - /* Wa_1306463417 - Send HS state for every primitive on gfx11. + /* Wa_1409433168 - Send HS state for every primitive on gfx11. * Wa_16011107343 (same for gfx12) * We implement this by setting TCS dirty on each draw. */ - if ((GFX_VER == 11 || GFX_VERx10 == 120) && + if ((INTEL_NEEDS_WA_1409433168 || INTEL_NEEDS_WA_16011107343) && ice->shaders.prog[MESA_SHADER_TESS_CTRL]) { ice->state.stage_dirty |= IRIS_STAGE_DIRTY_TCS; } diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index b1c76964662..cfdc6eb1e64 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -3396,9 +3396,9 @@ genX(cmd_buffer_flush_gfx_state)(struct anv_cmd_buffer *cmd_buffer) cmd_buffer->state.push_descriptors_dirty &= ~push_descriptor_dirty; } - /* Wa_1306463417, Wa_16011107343 - Send HS state for every primitive. */ + /* Wa_1409433168, Wa_16011107343 - Send HS state for every primitive. */ if (cmd_buffer->state.gfx.dirty & ANV_CMD_DIRTY_PIPELINE || - (GFX_VER == 11 || GFX_VERx10 == 120)) { + (INTEL_NEEDS_WA_1409433168 || INTEL_NEEDS_WA_16011107343)) { genX(emit_hs)(cmd_buffer); } @@ -3557,15 +3557,14 @@ anv_use_generated_draws(const struct anv_cmd_buffer *cmd_buffer, uint32_t count) { const struct anv_device *device = cmd_buffer->device; -#if GFX_VER == 11 || GFX_VERx10 == 120 /* Limit generated draws to pipelines without HS stage. This makes things - * simpler for implementing Wa_1306463417, Wa_16011107343. + * simpler for implementing Wa_1409433168, Wa_16011107343. */ - if (anv_pipeline_has_stage(cmd_buffer->state.gfx.pipeline, - MESA_SHADER_TESS_CTRL)) { + if ((INTEL_NEEDS_WA_1409433168 || INTEL_NEEDS_WA_16011107343) && + anv_pipeline_has_stage(cmd_buffer->state.gfx.pipeline, + MESA_SHADER_TESS_CTRL)) { return false; } -#endif return device->physical->generated_indirect_draws && count >= device->physical->instance->generated_indirect_threshold; @@ -4196,10 +4195,10 @@ void genX(CmdDrawMultiEXT)( #else vk_foreach_multi_draw(draw, i, pVertexInfo, drawCount, stride) { - /* Wa_1306463417, Wa_16011107343 - Send HS state for every primitive, + /* Wa_1409433168, Wa_16011107343 - Send HS state for every primitive, * first one was handled by cmd_buffer_flush_gfx_state. */ - if (i && (GFX_VER == 11 || GFX_VERx10 == 120)) + if (i && (INTEL_NEEDS_WA_1409433168 || INTEL_NEEDS_WA_16011107343)) genX(emit_hs)(cmd_buffer); anv_batch_emit(&cmd_buffer->batch, GENX(3DPRIMITIVE_EXTENDED), prim) { @@ -4406,10 +4405,10 @@ void genX(CmdDrawMultiIndexedEXT)( #else vk_foreach_multi_draw_indexed(draw, i, pIndexInfo, drawCount, stride) { - /* Wa_1306463417, Wa_16011107343 - Send HS state for every primitive, + /* Wa_1409433168, Wa_16011107343 - Send HS state for every primitive, * first one was handled by cmd_buffer_flush_gfx_state. */ - if (i && (GFX_VER == 11 || GFX_VERx10 == 120)) + if (i && (INTEL_NEEDS_WA_1409433168 || INTEL_NEEDS_WA_16011107343)) genX(emit_hs)(cmd_buffer); anv_batch_emit(&cmd_buffer->batch, GENX(3DPRIMITIVE_EXTENDED), prim) { @@ -4659,10 +4658,10 @@ emit_indirect_draws(struct anv_cmd_buffer *cmd_buffer, load_indirect_parameters(cmd_buffer, draw, indexed, i); - /* Wa_1306463417, Wa_16011107343 - Send HS state for every primitive, + /* Wa_1409433168, Wa_16011107343 - Send HS state for every primitive, * first one was handled by cmd_buffer_flush_gfx_state. */ - if (i && (GFX_VER == 11 || GFX_VERx10 == 120)) + if (i && (INTEL_NEEDS_WA_1409433168 || INTEL_NEEDS_WA_16011107343)) genX(emit_hs)(cmd_buffer); anv_batch_emit(&cmd_buffer->batch, @@ -4884,10 +4883,10 @@ emit_indirect_count_draws(struct anv_cmd_buffer *cmd_buffer, load_indirect_parameters(cmd_buffer, draw, indexed, i); - /* Wa_1306463417, Wa_16011107343 - Send HS state for every primitive, + /* Wa_1409433168, Wa_16011107343 - Send HS state for every primitive, * first one was handled by cmd_buffer_flush_gfx_state. */ - if (i && (GFX_VER == 11 || GFX_VERx10 == 120)) + if (i && (INTEL_NEEDS_WA_1409433168 || INTEL_NEEDS_WA_16011107343)) genX(emit_hs)(cmd_buffer); anv_batch_emit(&cmd_buffer->batch,