diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index e37333ba935..090ea895492 100644
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -2591,6 +2591,23 @@ emit_ray_intersection(struct ir3_context *ctx, nir_intrinsic_instr *intr,
 static void setup_input(struct ir3_context *ctx, nir_intrinsic_instr *intr);
 static void setup_output(struct ir3_context *ctx, nir_intrinsic_instr *intr);
 
+static struct ir3_instruction *
+apply_mov_half_shared_quirk(struct ir3_context *ctx,
+                            struct ir3_instruction *src,
+                            struct ir3_instruction *dst)
+{
+   /* Work around a bug with half-register non-shared -> shared moves by
+    * adding an extra mov here so that the original destination stays full.
+    */
+   if (src->dsts[0]->flags & IR3_REG_HALF) {
+      dst = ir3_MOV(&ctx->build, dst, TYPE_U32);
+      if (!ctx->compiler->has_scalar_alu)
+         dst->dsts[0]->flags &= ~IR3_REG_SHARED;
+   }
+
+   return dst;
+}
+
 static void
 emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
 {
@@ -3141,14 +3158,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
       dst[0] = ir3_READ_COND_MACRO(b, ir3_get_predicate(ctx, cond), 0, src, 0);
       dst[0]->dsts[0]->flags |= IR3_REG_SHARED;
       dst[0]->srcs[0]->flags |= IR3_REG_PREDICATE;
-      /* Work around a bug with half-register shared -> non-shared moves by
-       * adding an extra mov here so that the original destination stays full.
-       */
-      if (src->dsts[0]->flags & IR3_REG_HALF) {
-         dst[0] = ir3_MOV(b, dst[0], TYPE_U32);
-         if (!ctx->compiler->has_scalar_alu)
-            dst[0]->dsts[0]->flags &= ~IR3_REG_SHARED;
-      }
+      dst[0] = apply_mov_half_shared_quirk(ctx, src, dst[0]);
       break;
    }
 
@@ -3156,12 +3166,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
       struct ir3_instruction *src = ir3_get_src(ctx, &intr->src[0])[0];
       dst[0] = ir3_READ_FIRST_MACRO(b, src, 0);
       dst[0]->dsts[0]->flags |= IR3_REG_SHARED;
-      /* See above. */
-      if (src->dsts[0]->flags & IR3_REG_HALF) {
-         dst[0] = ir3_MOV(b, dst[0], TYPE_U32);
-         if (!ctx->compiler->has_scalar_alu)
-            dst[0]->dsts[0]->flags &= ~IR3_REG_SHARED;
-      }
+      dst[0] = apply_mov_half_shared_quirk(ctx, src, dst[0]);
       break;
    }
 
@@ -3169,12 +3174,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
       struct ir3_instruction *src = ir3_get_src(ctx, &intr->src[0])[0];
       dst[0] = ir3_READ_GETLAST_MACRO(b, src, 0);
       dst[0]->dsts[0]->flags |= IR3_REG_SHARED;
-      /* See above. */
-      if (src->dsts[0]->flags & IR3_REG_HALF) {
-         dst[0] = ir3_MOV(b, dst[0], TYPE_U32);
-         if (!ctx->compiler->has_scalar_alu)
-            dst[0]->dsts[0]->flags &= ~IR3_REG_SHARED;
-      }
+      dst[0] = apply_mov_half_shared_quirk(ctx, src, dst[0]);
       break;
    }