diff --git a/src/gallium/drivers/zink/zink_compiler.c b/src/gallium/drivers/zink/zink_compiler.c
index 22f0cadf2c7..ec37fc4f348 100644
--- a/src/gallium/drivers/zink/zink_compiler.c
+++ b/src/gallium/drivers/zink/zink_compiler.c
@@ -3556,6 +3556,9 @@ zink_shader_compile(struct zink_screen *screen, struct zink_shader *zs,
          if (zink_fs_key_base(key)->force_dual_color_blend && nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DATA1)) {
             NIR_PASS_V(nir, lower_dual_blend);
          }
+         if (zink_fs_key_base(key)->single_sample) {
+            NIR_PASS_V(nir, nir_lower_single_sampled);
+         }
          if (zink_fs_key_base(key)->coord_replace_bits)
             NIR_PASS_V(nir, nir_lower_texcoord_replace, zink_fs_key_base(key)->coord_replace_bits, false, false);
          if (zink_fs_key_base(key)->point_coord_yinvert)
diff --git a/src/gallium/drivers/zink/zink_draw.cpp b/src/gallium/drivers/zink/zink_draw.cpp
index 2aca3fc5e53..2d4fc4adfaf 100644
--- a/src/gallium/drivers/zink/zink_draw.cpp
+++ b/src/gallium/drivers/zink/zink_draw.cpp
@@ -637,8 +637,9 @@ zink_draw(struct pipe_context *pctx,
          VKCTX(CmdSetLineStippleEnableEXT)(batch->state->cmdbuf, rast_state->hw_state.line_stipple_enable);
    }
    if ((BATCH_CHANGED || ctx->sample_mask_changed) && screen->have_full_ds3) {
-      VKCTX(CmdSetRasterizationSamplesEXT)(batch->state->cmdbuf, (VkSampleCountFlagBits)(ctx->gfx_pipeline_state.rast_samples + 1));
-      VKCTX(CmdSetSampleMaskEXT)(batch->state->cmdbuf, (VkSampleCountFlagBits)(ctx->gfx_pipeline_state.rast_samples + 1), &ctx->gfx_pipeline_state.sample_mask);
+      uint8_t samples = ctx->gfx_pipeline_state.multisample ? ctx->gfx_pipeline_state.rast_samples + 1 : 1;
+      VKCTX(CmdSetRasterizationSamplesEXT)(batch->state->cmdbuf, (VkSampleCountFlagBits)(samples));
+      VKCTX(CmdSetSampleMaskEXT)(batch->state->cmdbuf, (VkSampleCountFlagBits)(samples), &ctx->gfx_pipeline_state.sample_mask);
       ctx->sample_mask_changed = false;
    }
    if ((BATCH_CHANGED || ctx->blend_state_changed) && screen->have_full_ds3) {
diff --git a/src/gallium/drivers/zink/zink_pipeline.c b/src/gallium/drivers/zink/zink_pipeline.c
index eb93b4d3eb6..f1055dc9f05 100644
--- a/src/gallium/drivers/zink/zink_pipeline.c
+++ b/src/gallium/drivers/zink/zink_pipeline.c
@@ -114,7 +114,7 @@ zink_create_gfx_pipeline(struct zink_screen *screen,
 
    VkPipelineMultisampleStateCreateInfo ms_state = {0};
    ms_state.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO;
-   ms_state.rasterizationSamples = state->rast_samples + 1;
+   ms_state.rasterizationSamples = state->multisample ? state->rast_samples + 1 : 1;
    if (state->blend_state) {
       ms_state.alphaToCoverageEnable = state->blend_state->alpha_to_coverage;
       if (state->blend_state->alpha_to_one && !screen->info.feats.features.alphaToOne) {
@@ -508,7 +508,7 @@ zink_create_gfx_pipeline_output(struct zink_screen *screen, struct zink_gfx_pipe
          }
          ms_state.alphaToOneEnable = state->blend_state->alpha_to_one;
       }
-      ms_state.rasterizationSamples = state->rast_samples + 1;
+      ms_state.rasterizationSamples = state->multisample ? state->rast_samples + 1 : 1;
       /* "If pSampleMask is NULL, it is treated as if the mask has all bits set to 1."
        * - Chapter 27. Rasterization
        *