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i965: Rename brw_inst's functions that access the register type

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Put hw_ in the name so that it's clear these are the hardware encodings.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
This commit is contained in:
Matt Turner
2017-07-26 14:25:54 -07:00
parent 3e379af492
commit 9fb8323328
7 changed files with 99 additions and 99 deletions
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src/intel/compiler/test_eu_validate.cpp
+47 -47
View File
@@ -208,19 +208,19 @@ TEST_P(validation_test, opcode46)
TEST_P(validation_test, dest_stride_must_be_equal_to_the_ratio_of_exec_size_to_dest_size)
{
brw_ADD(p, g0, g0, g0);
brw_inst_set_dst_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
brw_inst_set_src1_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
EXPECT_FALSE(validate(p));
clear_instructions(p);
brw_ADD(p, g0, g0, g0);
brw_inst_set_dst_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
brw_inst_set_src0_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
brw_inst_set_src1_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
EXPECT_TRUE(validate(p));
}
@@ -234,9 +234,9 @@ TEST_P(validation_test, dst_subreg_must_be_aligned_to_exec_type_size)
brw_ADD(p, g0, g0, g0);
brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 2);
brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
brw_inst_set_dst_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
brw_inst_set_src1_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
EXPECT_FALSE(validate(p));
@@ -246,12 +246,12 @@ TEST_P(validation_test, dst_subreg_must_be_aligned_to_exec_type_size)
brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_4);
brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 8);
brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
brw_inst_set_dst_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4);
brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4);
brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1);
brw_inst_set_src1_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4);
brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4);
brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1);
@@ -478,9 +478,9 @@ TEST_P(validation_test, source_cannot_span_more_than_2_registers)
{
brw_ADD(p, g0, g0, g0);
brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_32);
brw_inst_set_dst_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_8);
brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
@@ -491,9 +491,9 @@ TEST_P(validation_test, source_cannot_span_more_than_2_registers)
brw_ADD(p, g0, g0, g0);
brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16);
brw_inst_set_dst_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_8);
brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
@@ -515,9 +515,9 @@ TEST_P(validation_test, destination_cannot_span_more_than_2_registers)
brw_ADD(p, g0, g0, g0);
brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_32);
brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
brw_inst_set_dst_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
EXPECT_FALSE(validate(p));
@@ -527,12 +527,12 @@ TEST_P(validation_test, destination_cannot_span_more_than_2_registers)
brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_8);
brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 6);
brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_4);
brw_inst_set_dst_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4);
brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1);
brw_inst_set_src1_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4);
brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1);
@@ -544,9 +544,9 @@ TEST_P(validation_test, src_region_spans_two_regs_dst_region_spans_one)
{
/* Writes to dest are to the lower OWord */
brw_ADD(p, g0, g0, g0);
brw_inst_set_dst_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4);
brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
@@ -558,9 +558,9 @@ TEST_P(validation_test, src_region_spans_two_regs_dst_region_spans_one)
/* Writes to dest are to the upper OWord */
brw_ADD(p, g0, g0, g0);
brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 16);
brw_inst_set_dst_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4);
brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
@@ -572,9 +572,9 @@ TEST_P(validation_test, src_region_spans_two_regs_dst_region_spans_one)
/* Writes to dest are evenly split between OWords */
brw_ADD(p, g0, g0, g0);
brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16);
brw_inst_set_dst_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_8);
brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
@@ -587,12 +587,12 @@ TEST_P(validation_test, src_region_spans_two_regs_dst_region_spans_one)
brw_ADD(p, g0, g0, g0);
brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_4);
brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 10);
brw_inst_set_dst_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4);
brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4);
brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1);
brw_inst_set_src1_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_2);
brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1);
@@ -679,9 +679,9 @@ TEST_P(validation_test, two_src_two_dst_each_dst_must_be_derived_from_one_src)
brw_MOV(p, g0, g0);
brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16);
brw_inst_set_dst_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
brw_inst_set_src0_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_da1_subreg_nr(&devinfo, last_inst, 8);
brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4);
brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4);
@@ -716,9 +716,9 @@ TEST_P(validation_test, one_src_two_dst)
brw_ADD(p, g0, g0, g0);
brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16);
brw_inst_set_dst_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
brw_inst_set_src0_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
EXPECT_TRUE(validate(p));
@@ -727,9 +727,9 @@ TEST_P(validation_test, one_src_two_dst)
brw_ADD(p, g0, g0, g0);
brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16);
brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
brw_inst_set_dst_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_0);
brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_1);
brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0);
@@ -745,12 +745,12 @@ TEST_P(validation_test, one_src_two_dst)
brw_ADD(p, g0, g0, g0);
brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16);
brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
brw_inst_set_dst_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_0);
brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_1);
brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0);
brw_inst_set_src1_reg_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
if (devinfo.gen >= 8) {
EXPECT_TRUE(validate(p));