From 9f1e2e50533e944e54dec2b69aabe60e8c42cd2f Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Thu, 22 Aug 2024 14:41:48 -0400 Subject: [PATCH] ail: clarify metadata buffer calculation there's a very good reason that the calculation is what it is. Signed-off-by: Alyssa Rosenzweig Part-of: --- src/asahi/layout/layout.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/src/asahi/layout/layout.c b/src/asahi/layout/layout.c index 929ddc75ffb..fa70802fa9d 100644 --- a/src/asahi/layout/layout.c +++ b/src/asahi/layout/layout.c @@ -229,10 +229,15 @@ ail_initialize_compression(struct ail_layout *layout) layout->level_offsets_compressed_B[l] = compbuf_B; - /* The compression buffer seems to have 8 bytes per 16 x 16 sample block. */ - unsigned cmpw_el = DIV_ROUND_UP(util_next_power_of_two(width_sa), 16); - unsigned cmph_el = DIV_ROUND_UP(util_next_power_of_two(height_sa), 16); - compbuf_B += ALIGN_POT(cmpw_el * cmph_el * 8, AIL_CACHELINE); + /* The metadata buffer contains 8 bytes per 16x16 compression tile. + * Addressing is fully twiddled, so both width and height are padded to + * powers-of-two. + */ + unsigned w_tl = DIV_ROUND_UP(util_next_power_of_two(width_sa), 16); + unsigned h_tl = DIV_ROUND_UP(util_next_power_of_two(height_sa), 16); + unsigned B_per_tl_2 = 8; + + compbuf_B += ALIGN_POT(w_tl * h_tl * B_per_tl_2, AIL_CACHELINE); width_sa = DIV_ROUND_UP(width_sa, 2); height_sa = DIV_ROUND_UP(height_sa, 2);