diff --git a/src/freedreno/vulkan/tu_cmd_buffer.cc b/src/freedreno/vulkan/tu_cmd_buffer.cc
index 9902abe4f51..fbfdb5f6a89 100644
--- a/src/freedreno/vulkan/tu_cmd_buffer.cc
+++ b/src/freedreno/vulkan/tu_cmd_buffer.cc
@@ -4450,7 +4450,7 @@ tu_CmdBeginRendering(VkCommandBuffer commandBuffer,
       cmd->state.lrz.valid = false;
    } else {
       if (resuming)
-         tu_lrz_begin_resumed_renderpass(cmd);
+         tu_lrz_begin_resumed_renderpass<CHIP>(cmd);
       else
          tu_lrz_begin_renderpass<CHIP>(cmd);
    }
diff --git a/src/freedreno/vulkan/tu_lrz.cc b/src/freedreno/vulkan/tu_lrz.cc
index 29603f3af00..499c0aa5231 100644
--- a/src/freedreno/vulkan/tu_lrz.cc
+++ b/src/freedreno/vulkan/tu_lrz.cc
@@ -215,11 +215,19 @@ tu_lrz_init_secondary(struct tu_cmd_buffer *cmd,
    cmd->state.lrz.reuse_previous_state = false;
 }
 
+template <chip CHIP>
+bool
+tu_lrzfc_depth_supported(float depth) {
+   /* A7XX supports fast-clearing to any value, while A6XX only supports 0.0/1.0 */
+   return CHIP >= A7XX || depth == 0.0f || depth == 1.0f;
+}
+
 /* This is generally the same as tu_lrz_begin_renderpass(), but we skip
  * actually emitting anything. The lrz state needs to be consistent between
  * renderpasses, but only the first should actually emit commands to disable
  * lrz etc.
  */
+template <chip CHIP>
 void
 tu_lrz_begin_resumed_renderpass(struct tu_cmd_buffer *cmd)
 {
@@ -239,12 +247,12 @@ tu_lrz_begin_resumed_renderpass(struct tu_cmd_buffer *cmd)
          VkClearValue clear = cmd->state.clear_values[a];
          cmd->state.lrz.depth_clear_value = clear;
          cmd->state.lrz.fast_clear = cmd->state.lrz.fast_clear &&
-                                     (clear.depthStencil.depth == 0.f ||
-                                      clear.depthStencil.depth == 1.f);
+                                     tu_lrzfc_depth_supported<CHIP>(clear.depthStencil.depth);
       }
       cmd->state.dirty |= TU_CMD_DIRTY_LRZ;
    }
 }
+TU_GENX(tu_lrz_begin_resumed_renderpass);
 
 template <chip CHIP>
 void
@@ -283,7 +291,7 @@ tu_lrz_begin_renderpass(struct tu_cmd_buffer *cmd)
    }
 
     /* Track LRZ valid state */
-   tu_lrz_begin_resumed_renderpass(cmd);
+   tu_lrz_begin_resumed_renderpass<CHIP>(cmd);
 
    if (!cmd->state.lrz.valid) {
       tu6_emit_lrz_buffer<CHIP>(&cmd->cs, NULL);
@@ -355,6 +363,8 @@ tu_lrz_tiling_begin(struct tu_cmd_buffer *cmd, struct tu_cs *cs)
        * LRZ_CLEAR.disable_on_wrong_dir + LRZ_CLEAR - sets direction to
        *  CUR_DIR_UNSET.
        */
+      if (CHIP >= A7XX)
+         tu_cs_emit_regs(cs, A7XX_GRAS_LRZ_CLEAR_DEPTH_F32(lrz->depth_clear_value.depthStencil.depth));
       tu_emit_event_write<CHIP>(cmd, cs, FD_LRZ_CLEAR);
    }
 
@@ -440,6 +450,8 @@ tu_lrz_sysmem_begin(struct tu_cmd_buffer *cmd, struct tu_cs *cs)
             .fc_enable = true,
          });
 
+         if (CHIP >= A7XX)
+            tu_cs_emit_regs(cs, A7XX_GRAS_LRZ_CLEAR_DEPTH_F32(lrz->depth_clear_value.depthStencil.depth));
          tu_emit_event_write<CHIP>(cmd, &cmd->cs, FD_LRZ_CLEAR);
          tu_emit_event_write<CHIP>(cmd, &cmd->cs, FD_LRZ_FLUSH);
       } else {
@@ -502,8 +514,8 @@ tu_lrz_clear_depth_image(struct tu_cmd_buffer *cmd,
    if (!range)
       return;
 
-   bool fast_clear = image->has_lrz_fc && (pDepthStencil->depth == 0.f ||
-                                            pDepthStencil->depth == 1.f);
+   bool fast_clear = image->has_lrz_fc &&
+                     tu_lrzfc_depth_supported<CHIP>(pDepthStencil->depth);
 
    tu6_emit_lrz_buffer<CHIP>(&cmd->cs, image);
 
@@ -519,6 +531,8 @@ tu_lrz_clear_depth_image(struct tu_cmd_buffer *cmd,
       .disable_on_wrong_dir = true,
    });
 
+   if (CHIP >= A7XX)
+      tu_cs_emit_regs(&cmd->cs, A7XX_GRAS_LRZ_CLEAR_DEPTH_F32(pDepthStencil->depth));
    tu_emit_event_write<CHIP>(cmd, &cmd->cs, FD_LRZ_CLEAR);
    tu_emit_event_write<CHIP>(cmd, &cmd->cs, FD_LRZ_FLUSH);
 
diff --git a/src/freedreno/vulkan/tu_lrz.h b/src/freedreno/vulkan/tu_lrz.h
index c81c3a5114e..4132c9c05e8 100644
--- a/src/freedreno/vulkan/tu_lrz.h
+++ b/src/freedreno/vulkan/tu_lrz.h
@@ -116,6 +116,7 @@ template <chip CHIP>
 void
 tu_lrz_begin_renderpass(struct tu_cmd_buffer *cmd);
 
+template <chip CHIP>
 void
 tu_lrz_begin_resumed_renderpass(struct tu_cmd_buffer *cmd);