intel/fs: Do a stalling MFENCE in endInvocationInterlock()
Fixes: 939312702e "i965: Add ARB_fragment_shader_interlock support"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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@@ -4273,7 +4273,8 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
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case nir_intrinsic_memory_barrier: {
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const fs_builder ubld = bld.group(8, 0);
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const fs_reg tmp = ubld.vgrf(BRW_REGISTER_TYPE_UD, 2);
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ubld.emit(SHADER_OPCODE_MEMORY_FENCE, tmp, brw_vec8_grf(0, 0))
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ubld.emit(SHADER_OPCODE_MEMORY_FENCE, tmp,
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brw_vec8_grf(0, 0), brw_imm_ud(0))
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->size_written = 2 * REG_SIZE;
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break;
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}
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@@ -5080,7 +5081,20 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
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}
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case nir_intrinsic_end_invocation_interlock: {
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/* We don't need to do anything here */
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/* For endInvocationInterlock(), we need to insert a memory fence which
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* stalls in the shader until the memory transactions prior to that
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* fence are complete. This ensures that the shader does not end before
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* any writes from its critical section have landed. Otherwise, you can
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* end up with a case where the next invocation on that pixel properly
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* stalls for previous FS invocation on its pixel to complete but
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* doesn't actually wait for the dataport memory transactions from that
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* thread to land before submitting its own.
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*/
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const fs_builder ubld = bld.group(8, 0);
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const fs_reg tmp = ubld.vgrf(BRW_REGISTER_TYPE_UD, 2);
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ubld.emit(SHADER_OPCODE_MEMORY_FENCE, tmp,
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brw_vec8_grf(0, 0), brw_imm_ud(1))
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->size_written = 2 * REG_SIZE;
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break;
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}
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