From 9d477fae68bf1a053a3536d1219ffbf217389da4 Mon Sep 17 00:00:00 2001 From: David Rosca Date: Sat, 9 Nov 2024 12:01:54 +0100 Subject: [PATCH] radv/video: Remove dt_field_mode handling code This would be used for decoding into interlaced buffer, but since that's not support it is a dead code. Reviewed-by: Dave Airlie Part-of: --- src/amd/vulkan/radv_video.c | 33 +++++++-------------------------- src/amd/vulkan/radv_video.h | 1 - 2 files changed, 7 insertions(+), 27 deletions(-) diff --git a/src/amd/vulkan/radv_video.c b/src/amd/vulkan/radv_video.c index 611a921be3f..fd8b1cdc1ea 100644 --- a/src/amd/vulkan/radv_video.c +++ b/src/amd/vulkan/radv_video.c @@ -429,7 +429,6 @@ radv_CreateVideoSessionKHR(VkDevice _device, const VkVideoSessionCreateInfoKHR * return result; } - vid->interlaced = false; vid->dpb_type = DPB_MAX_RES; switch (vid->vk.op) { @@ -1987,7 +1986,7 @@ rvcn_dec_message_decode(struct radv_cmd_buffer *cmd_buffer, struct radv_video_se decode->dt_tiling_mode = 0; decode->dt_swizzle_mode = luma->surface.u.gfx9.swizzle_mode; decode->dt_array_mode = pdev->vid_addr_gfx_mode; - decode->dt_field_mode = vid->interlaced ? 1 : 0; + decode->dt_field_mode = 0; decode->dt_surf_tile_config = 0; decode->dt_uv_surf_tile_config = 0; @@ -1997,14 +1996,9 @@ rvcn_dec_message_decode(struct radv_cmd_buffer *cmd_buffer, struct radv_video_se dt_array_idx * luma->surface.u.gfx9.surf_slice_size; decode->dt_chroma_top_offset = chroma->surface.u.gfx9.surf_offset + dt_array_idx * chroma->surface.u.gfx9.surf_slice_size; + decode->dt_luma_bottom_offset = decode->dt_luma_top_offset; + decode->dt_chroma_bottom_offset = decode->dt_chroma_top_offset; - if (decode->dt_field_mode) { - decode->dt_luma_bottom_offset = luma->surface.u.gfx9.surf_offset + luma->surface.u.gfx9.surf_slice_size; - decode->dt_chroma_bottom_offset = chroma->surface.u.gfx9.surf_offset + chroma->surface.u.gfx9.surf_slice_size; - } else { - decode->dt_luma_bottom_offset = decode->dt_luma_top_offset; - decode->dt_chroma_bottom_offset = decode->dt_chroma_top_offset; - } if (vid->stream_type == RDECODE_CODEC_AV1) decode->db_pitch_uv = chroma->surface.u.gfx9.surf_pitch * chroma->surface.blk_w; @@ -2472,15 +2466,8 @@ ruvd_dec_message_decode(struct radv_device *device, struct radv_video_session *v dt_array_idx * luma->surface.u.gfx9.surf_slice_size; msg->body.decode.dt_chroma_top_offset = chroma->surface.u.gfx9.surf_offset + dt_array_idx * chroma->surface.u.gfx9.surf_slice_size; - if (msg->body.decode.dt_field_mode) { - msg->body.decode.dt_luma_bottom_offset = - luma->surface.u.gfx9.surf_offset + luma->surface.u.gfx9.surf_slice_size; - msg->body.decode.dt_chroma_bottom_offset = - chroma->surface.u.gfx9.surf_offset + chroma->surface.u.gfx9.surf_slice_size; - } else { - msg->body.decode.dt_luma_bottom_offset = msg->body.decode.dt_luma_top_offset; - msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset; - } + msg->body.decode.dt_luma_bottom_offset = msg->body.decode.dt_luma_top_offset; + msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset; msg->body.decode.dt_surf_tile_config = 0; } else { msg->body.decode.dt_pitch = luma->surface.u.legacy.level[0].nblk_x * luma->surface.blk_w; @@ -2505,14 +2492,8 @@ ruvd_dec_message_decode(struct radv_device *device, struct radv_video_session *v msg->body.decode.dt_luma_top_offset = texture_offset_legacy(&luma->surface, dt_array_idx); if (chroma) msg->body.decode.dt_chroma_top_offset = texture_offset_legacy(&chroma->surface, dt_array_idx); - if (msg->body.decode.dt_field_mode) { - msg->body.decode.dt_luma_bottom_offset = texture_offset_legacy(&luma->surface, 1); - if (chroma) - msg->body.decode.dt_chroma_bottom_offset = texture_offset_legacy(&chroma->surface, 1); - } else { - msg->body.decode.dt_luma_bottom_offset = msg->body.decode.dt_luma_top_offset; - msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset; - } + msg->body.decode.dt_luma_bottom_offset = msg->body.decode.dt_luma_top_offset; + msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset; if (chroma) { assert(luma->surface.u.legacy.bankw == chroma->surface.u.legacy.bankw); diff --git a/src/amd/vulkan/radv_video.h b/src/amd/vulkan/radv_video.h index 7f035761fd9..4cf600cdbb1 100644 --- a/src/amd/vulkan/radv_video.h +++ b/src/amd/vulkan/radv_video.h @@ -36,7 +36,6 @@ struct radv_video_session { uint32_t stream_handle; unsigned stream_type; - bool interlaced; bool encode; enum { DPB_MAX_RES = 0, DPB_DYNAMIC_TIER_1, DPB_DYNAMIC_TIER_2 } dpb_type; unsigned db_alignment;