From 9c67dde401ea0ceb0c159428d0775948108343fb Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Tue, 23 May 2023 10:00:20 +0300 Subject: [PATCH] intel: reduce minimum memory alignment on Gfx12.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Lionel Landwerlin Reviewed-by: Kenneth Graunke Tested-by: José Roberto de Souza Part-of: --- src/intel/dev/i915/intel_device_info.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/src/intel/dev/i915/intel_device_info.c b/src/intel/dev/i915/intel_device_info.c index 995cf6f1a32..be6fe115a08 100644 --- a/src/intel/dev/i915/intel_device_info.c +++ b/src/intel/dev/i915/intel_device_info.c @@ -610,12 +610,9 @@ bool intel_device_info_i915_get_info_from_fd(int fd, struct intel_device_info *d if (getparam(fd, I915_PARAM_HAS_CONTEXT_ISOLATION, &val)) devinfo->has_context_isolation = val; - /* TODO: i915 don't require anymore the 2Mb alignment for gfx 12.5 and - * newer but using 64k brings some issues like unaligned offsets with - * aux map aligned to 1Mb in MTL. - */ + /* TODO: We might be able to reduce alignment to 4Kb on DG1. */ if (devinfo->verx10 >= 125) - devinfo->mem_alignment = 2 * 1024 * 1024; + devinfo->mem_alignment = 64 * 1024; else if (devinfo->has_local_mem) devinfo->mem_alignment = 64 * 1024; else