diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c index 71f089534a3..d0bb2446957 100644 --- a/src/amd/vulkan/radv_shader_info.c +++ b/src/amd/vulkan/radv_shader_info.c @@ -23,7 +23,6 @@ #include "radv_private.h" #include "radv_shader.h" #include "nir/nir.h" -#include "nir/nir_deref.h" #include "nir/nir_xfb_info.h" static void mark_sampler_desc(const nir_variable *var, @@ -49,69 +48,6 @@ static void mark_tess_output(struct radv_shader_info *info, info->tcs.outputs_written |= (mask << param); } -static void -get_deref_offset(nir_deref_instr *instr, - unsigned *const_out) -{ - nir_variable *var = nir_deref_instr_get_variable(instr); - nir_deref_path path; - unsigned idx_lvl = 1; - - if (var->data.compact) { - assert(instr->deref_type == nir_deref_type_array); - *const_out = nir_src_as_uint(instr->arr.index); - return; - } - - nir_deref_path_init(&path, instr, NULL); - - uint32_t const_offset = 0; - - for (; path.path[idx_lvl]; ++idx_lvl) { - const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type; - if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) { - unsigned index = path.path[idx_lvl]->strct.index; - - for (unsigned i = 0; i < index; i++) { - const struct glsl_type *ft = glsl_get_struct_field(parent_type, i); - const_offset += glsl_count_attribute_slots(ft, false); - } - } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) { - unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, false); - if (nir_src_is_const(path.path[idx_lvl]->arr.index)) - const_offset += nir_src_as_uint(path.path[idx_lvl]->arr.index) * size; - } else - unreachable("Uhandled deref type in get_deref_instr_offset"); - } - - *const_out = const_offset; - - nir_deref_path_finish(&path); -} - -static void -gather_intrinsic_load_deref_info(const nir_shader *nir, - const nir_intrinsic_instr *instr, - struct radv_shader_info *info) -{ - switch (nir->info.stage) { - case MESA_SHADER_VERTEX: { - nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr)); - - if (var && var->data.mode == nir_var_shader_in) { - unsigned idx = var->data.location; - uint8_t mask = nir_ssa_def_components_read(&instr->dest.ssa); - - info->vs.input_usage_mask[idx] |= - mask << var->data.location_frac; - } - break; - } - default: - break; - } -} - static void gather_intrinsic_load_input_info(const nir_shader *nir, const nir_intrinsic_instr *instr, @@ -140,36 +76,6 @@ widen_writemask(uint32_t wrmask) return new_wrmask; } -static void -set_output_usage_mask(const nir_shader *nir, const nir_intrinsic_instr *instr, - uint8_t *output_usage_mask) -{ - nir_deref_instr *deref_instr = - nir_instr_as_deref(instr->src[0].ssa->parent_instr); - nir_variable *var = nir_deref_instr_get_variable(deref_instr); - unsigned attrib_count = glsl_count_attribute_slots(deref_instr->type, false); - unsigned idx = var->data.location; - unsigned comp = var->data.location_frac; - unsigned const_offset = 0; - - get_deref_offset(deref_instr, &const_offset); - - if (var->data.compact) { - assert(!glsl_type_is_64bit(deref_instr->type)); - const_offset += comp; - output_usage_mask[idx + const_offset / 4] |= 1 << (const_offset % 4); - return; - } - - uint32_t wrmask = nir_intrinsic_write_mask(instr); - if (glsl_type_is_64bit(deref_instr->type)) - wrmask = widen_writemask(wrmask); - - for (unsigned i = 0; i < attrib_count; i++) - output_usage_mask[idx + i + const_offset] |= - ((wrmask >> (i * 4)) & 0xf) << comp; -} - static void set_writes_memory(const nir_shader *nir, struct radv_shader_info *info) { @@ -177,49 +83,6 @@ set_writes_memory(const nir_shader *nir, struct radv_shader_info *info) info->ps.writes_memory = true; } -static void -gather_intrinsic_store_deref_info(const nir_shader *nir, - const nir_intrinsic_instr *instr, - struct radv_shader_info *info) -{ - nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr)); - - if (var && var->data.mode == nir_var_shader_out) { - unsigned idx = var->data.location; - - switch (nir->info.stage) { - case MESA_SHADER_VERTEX: - set_output_usage_mask(nir, instr, - info->vs.output_usage_mask); - break; - case MESA_SHADER_GEOMETRY: - set_output_usage_mask(nir, instr, - info->gs.output_usage_mask); - break; - case MESA_SHADER_TESS_EVAL: - set_output_usage_mask(nir, instr, - info->tes.output_usage_mask); - break; - case MESA_SHADER_TESS_CTRL: { - unsigned param = shader_io_get_unique_index(idx); - const struct glsl_type *type = var->type; - - if (!var->data.patch) - type = glsl_get_array_element(var->type); - - unsigned slots = - var->data.compact ? DIV_ROUND_UP(var->data.location_frac + glsl_get_length(type), 4) - : glsl_count_attribute_slots(type, false); - - mark_tess_output(info, var->data.patch, param, slots); - break; - } - default: - break; - } - } -} - static void gather_intrinsic_store_output_info(const nir_shader *nir, const nir_intrinsic_instr *instr, @@ -404,29 +267,9 @@ gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr, case nir_intrinsic_load_input: gather_intrinsic_load_input_info(nir, instr, info); break; - case nir_intrinsic_load_deref: - gather_intrinsic_load_deref_info(nir, instr, info); - break; - case nir_intrinsic_store_deref: - gather_intrinsic_store_deref_info(nir, instr, info); - /* fallthrough */ - case nir_intrinsic_deref_atomic_add: - case nir_intrinsic_deref_atomic_imin: - case nir_intrinsic_deref_atomic_umin: - case nir_intrinsic_deref_atomic_imax: - case nir_intrinsic_deref_atomic_umax: - case nir_intrinsic_deref_atomic_and: - case nir_intrinsic_deref_atomic_or: - case nir_intrinsic_deref_atomic_xor: - case nir_intrinsic_deref_atomic_exchange: - case nir_intrinsic_deref_atomic_comp_swap: { - if (nir_src_as_deref(instr->src[0])->mode & (nir_var_mem_global | nir_var_mem_ssbo)) - set_writes_memory(nir, info); - break; case nir_intrinsic_store_output: gather_intrinsic_store_output_info(nir, instr, info); break; - } default: break; }