From 9b98cebe9aa36298cbc6a69f2f73c05748722a34 Mon Sep 17 00:00:00 2001 From: Nanley Chery Date: Thu, 15 Aug 2024 17:58:21 -0400 Subject: [PATCH] intel: Drop BLORP_BATCH_NO_UPDATE_CLEAR_COLOR All drivers update the clear color themselves. So, drop the functionality from BLORP as well as the flag controlling it. Reviewed-by: Lionel Landwerlin Part-of: --- src/gallium/drivers/crocus/crocus_clear.c | 5 --- src/gallium/drivers/iris/iris_clear.c | 3 +- src/intel/blorp/blorp.h | 11 ++--- src/intel/blorp/blorp_genX_exec_brw.h | 55 ----------------------- src/intel/blorp/blorp_genX_exec_elk.h | 42 ----------------- src/intel/vulkan/anv_blorp.c | 6 +-- src/intel/vulkan_hasvk/anv_blorp.c | 6 +-- 7 files changed, 8 insertions(+), 120 deletions(-) diff --git a/src/gallium/drivers/crocus/crocus_clear.c b/src/gallium/drivers/crocus/crocus_clear.c index abdf3409989..7743807d66e 100644 --- a/src/gallium/drivers/crocus/crocus_clear.c +++ b/src/gallium/drivers/crocus/crocus_clear.c @@ -288,11 +288,6 @@ fast_clear_color(struct crocus_context *ice, "fast clear: pre-flush", PIPE_CONTROL_RENDER_TARGET_FLUSH); - /* If we reach this point, we need to fast clear to change the state to - * ISL_AUX_STATE_CLEAR, or to update the fast clear color (or both). - */ - blorp_flags |= color_changed ? 0 : BLORP_BATCH_NO_UPDATE_CLEAR_COLOR; - struct blorp_batch blorp_batch; blorp_batch_init(&ice->blorp, &blorp_batch, batch, blorp_flags); diff --git a/src/gallium/drivers/iris/iris_clear.c b/src/gallium/drivers/iris/iris_clear.c index c3f19508005..1a33332f001 100644 --- a/src/gallium/drivers/iris/iris_clear.c +++ b/src/gallium/drivers/iris/iris_clear.c @@ -295,8 +295,7 @@ fast_clear_color(struct iris_context *ice, iris_batch_sync_region_start(batch); struct blorp_batch blorp_batch; - blorp_batch_init(&ice->blorp, &blorp_batch, batch, - BLORP_BATCH_NO_UPDATE_CLEAR_COLOR); + blorp_batch_init(&ice->blorp, &blorp_batch, batch, 0); struct blorp_surf surf; iris_blorp_surf_for_resource(batch, &surf, p_res, res->aux.usage, diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h index 0cbd36b9659..76afb9af784 100644 --- a/src/intel/blorp/blorp.h +++ b/src/intel/blorp/blorp.h @@ -123,21 +123,16 @@ enum blorp_batch_flags { /* This flag indicates that the blorp call should be predicated. */ BLORP_BATCH_PREDICATE_ENABLE = BITFIELD_BIT(1), - /* This flag indicates that blorp should *not* update the indirect clear - * color buffer. - */ - BLORP_BATCH_NO_UPDATE_CLEAR_COLOR = BITFIELD_BIT(2), - /* This flag indicates that blorp should use a compute program for the * operation. */ - BLORP_BATCH_USE_COMPUTE = BITFIELD_BIT(3), + BLORP_BATCH_USE_COMPUTE = BITFIELD_BIT(2), /** Use the hardware blitter to perform any operations in this batch */ - BLORP_BATCH_USE_BLITTER = BITFIELD_BIT(4), + BLORP_BATCH_USE_BLITTER = BITFIELD_BIT(3), /** Wa_18038825448 */ - BLORP_BATCH_FORCE_CPS_DEPENDENCY = BITFIELD_BIT(5), + BLORP_BATCH_FORCE_CPS_DEPENDENCY = BITFIELD_BIT(4), }; struct blorp_batch { diff --git a/src/intel/blorp/blorp_genX_exec_brw.h b/src/intel/blorp/blorp_genX_exec_brw.h index 965a3ac318b..542a5557a4a 100644 --- a/src/intel/blorp/blorp_genX_exec_brw.h +++ b/src/intel/blorp/blorp_genX_exec_brw.h @@ -1519,52 +1519,6 @@ blorp_emit_gfx8_hiz_op(struct blorp_batch *batch, blorp_measure_end(batch, params); } -static void -blorp_update_clear_color(UNUSED struct blorp_batch *batch, - const struct blorp_surface_info *info) -{ - assert(info->clear_color_addr.buffer != NULL); - - uint32_t pixel[4]; - isl_color_value_pack(&info->clear_color, info->surf.format, pixel); - -#if GFX_VER == 12 - uint32_t *dw = blorp_emitn(batch, GENX(MI_STORE_DATA_IMM), 3 + 6, - .ForceWriteCompletionCheck = true, - .StoreQword = true, - .Address = info->clear_color_addr); - /* dw starts at dword 1 */ - dw[2] = info->clear_color.u32[0]; - dw[3] = info->clear_color.u32[1]; - dw[4] = info->clear_color.u32[2]; - dw[5] = info->clear_color.u32[3]; - dw[6] = pixel[0]; - dw[7] = pixel[1]; - -#elif GFX_VER == 11 - uint32_t *dw = blorp_emitn(batch, GENX(MI_STORE_DATA_IMM), 3 + 6, - .StoreQword = true, - .Address = info->clear_color_addr); - /* dw starts at dword 1 */ - dw[2] = info->clear_color.u32[0]; - dw[3] = info->clear_color.u32[1]; - dw[4] = info->clear_color.u32[2]; - dw[5] = info->clear_color.u32[3]; - dw[6] = pixel[0]; - dw[7] = pixel[1]; - -#else - - for (int i = 0; i < 4; i++) { - blorp_emit(batch, GENX(MI_STORE_DATA_IMM), sdi) { - sdi.Address = info->clear_color_addr; - sdi.Address.offset += i * 4; - sdi.ImmediateData = info->clear_color.u32[i]; - } - } -#endif -} - static bool blorp_uses_bti_rt_writes(const struct blorp_batch *batch, const struct blorp_params *params) { @@ -1578,12 +1532,6 @@ blorp_uses_bti_rt_writes(const struct blorp_batch *batch, const struct blorp_par static void blorp_exec_3d(struct blorp_batch *batch, const struct blorp_params *params) { - if (!(batch->flags & BLORP_BATCH_NO_UPDATE_CLEAR_COLOR) && - params->fast_clear_op == ISL_AUX_OP_FAST_CLEAR && - params->dst.clear_color_addr.buffer != NULL) { - blorp_update_clear_color(batch, ¶ms->dst); - } - if (params->hiz_op != ISL_AUX_OP_NONE) { blorp_emit_gfx8_hiz_op(batch, params); return; @@ -1677,7 +1625,6 @@ blorp_get_compute_push_const(struct blorp_batch *batch, static void blorp_exec_compute(struct blorp_batch *batch, const struct blorp_params *params) { - assert(!(batch->flags & BLORP_BATCH_NO_UPDATE_CLEAR_COLOR)); assert(!(batch->flags & BLORP_BATCH_PREDICATE_ENABLE)); assert(params->hiz_op == ISL_AUX_OP_NONE); @@ -1947,7 +1894,6 @@ blorp_xy_block_copy_blt(struct blorp_batch *batch, UNUSED const struct isl_device *isl_dev = batch->blorp->isl_dev; assert(batch->flags & BLORP_BATCH_USE_BLITTER); - assert(!(batch->flags & BLORP_BATCH_NO_UPDATE_CLEAR_COLOR)); assert(!(batch->flags & BLORP_BATCH_PREDICATE_ENABLE)); assert(params->hiz_op == ISL_AUX_OP_NONE); @@ -2101,7 +2047,6 @@ blorp_xy_fast_color_blit(struct blorp_batch *batch, isl_format_get_layout(params->dst.view.format); assert(batch->flags & BLORP_BATCH_USE_BLITTER); - assert(!(batch->flags & BLORP_BATCH_NO_UPDATE_CLEAR_COLOR)); assert(!(batch->flags & BLORP_BATCH_PREDICATE_ENABLE)); assert(params->hiz_op == ISL_AUX_OP_NONE); diff --git a/src/intel/blorp/blorp_genX_exec_elk.h b/src/intel/blorp/blorp_genX_exec_elk.h index fe357adbdf5..b5445e37ce9 100644 --- a/src/intel/blorp/blorp_genX_exec_elk.h +++ b/src/intel/blorp/blorp_genX_exec_elk.h @@ -1831,41 +1831,6 @@ blorp_emit_gfx8_hiz_op(struct blorp_batch *batch, } #endif -static void -blorp_update_clear_color(UNUSED struct blorp_batch *batch, - const struct blorp_surface_info *info) -{ - assert(info->clear_color_addr.buffer != NULL); -#if GFX_VER >= 7 - blorp_emit(batch, GENX(MI_STORE_DATA_IMM), sdi) { - sdi.Address = info->clear_color_addr; - sdi.ImmediateData = ISL_CHANNEL_SELECT_RED << 25 | - ISL_CHANNEL_SELECT_GREEN << 22 | - ISL_CHANNEL_SELECT_BLUE << 19 | - ISL_CHANNEL_SELECT_ALPHA << 16; - if (isl_format_has_int_channel(info->view.format)) { - for (unsigned i = 0; i < 4; i++) { - assert(info->clear_color.u32[i] == 0 || - info->clear_color.u32[i] == 1); - } - sdi.ImmediateData |= (info->clear_color.u32[0] != 0) << 31; - sdi.ImmediateData |= (info->clear_color.u32[1] != 0) << 30; - sdi.ImmediateData |= (info->clear_color.u32[2] != 0) << 29; - sdi.ImmediateData |= (info->clear_color.u32[3] != 0) << 28; - } else { - for (unsigned i = 0; i < 4; i++) { - assert(info->clear_color.f32[i] == 0.0f || - info->clear_color.f32[i] == 1.0f); - } - sdi.ImmediateData |= (info->clear_color.f32[0] != 0.0f) << 31; - sdi.ImmediateData |= (info->clear_color.f32[1] != 0.0f) << 30; - sdi.ImmediateData |= (info->clear_color.f32[2] != 0.0f) << 29; - sdi.ImmediateData |= (info->clear_color.f32[3] != 0.0f) << 28; - } - } -#endif -} - static bool blorp_uses_bti_rt_writes(const struct blorp_batch *batch, const struct blorp_params *params) { @@ -1879,12 +1844,6 @@ blorp_uses_bti_rt_writes(const struct blorp_batch *batch, const struct blorp_par static void blorp_exec_3d(struct blorp_batch *batch, const struct blorp_params *params) { - if (!(batch->flags & BLORP_BATCH_NO_UPDATE_CLEAR_COLOR) && - params->fast_clear_op == ISL_AUX_OP_FAST_CLEAR && - params->dst.clear_color_addr.buffer != NULL) { - blorp_update_clear_color(batch, ¶ms->dst); - } - #if GFX_VER >= 8 if (params->hiz_op != ISL_AUX_OP_NONE) { blorp_emit_gfx8_hiz_op(batch, params); @@ -1972,7 +1931,6 @@ blorp_get_compute_push_const(struct blorp_batch *batch, static void blorp_exec_compute(struct blorp_batch *batch, const struct blorp_params *params) { - assert(!(batch->flags & BLORP_BATCH_NO_UPDATE_CLEAR_COLOR)); assert(!(batch->flags & BLORP_BATCH_PREDICATE_ENABLE)); assert(params->hiz_op == ISL_AUX_OP_NONE); diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c index 5d4392ef5a9..3216e0598dd 100644 --- a/src/intel/vulkan/anv_blorp.c +++ b/src/intel/vulkan/anv_blorp.c @@ -2386,8 +2386,7 @@ anv_image_mcs_op(struct anv_cmd_buffer *cmd_buffer, { struct blorp_batch batch; anv_blorp_batch_init(cmd_buffer, &batch, - BLORP_BATCH_PREDICATE_ENABLE * predicate + - BLORP_BATCH_NO_UPDATE_CLEAR_COLOR); + BLORP_BATCH_PREDICATE_ENABLE * predicate); assert((batch.flags & BLORP_BATCH_USE_COMPUTE) == 0); exec_mcs_op(cmd_buffer, &batch, image, format, swizzle, aspect, @@ -2407,8 +2406,7 @@ anv_image_ccs_op(struct anv_cmd_buffer *cmd_buffer, { struct blorp_batch batch; anv_blorp_batch_init(cmd_buffer, &batch, - BLORP_BATCH_PREDICATE_ENABLE * predicate + - BLORP_BATCH_NO_UPDATE_CLEAR_COLOR); + BLORP_BATCH_PREDICATE_ENABLE * predicate); assert((batch.flags & BLORP_BATCH_USE_COMPUTE) == 0); exec_ccs_op(cmd_buffer, &batch, image, format, swizzle, aspect, level, diff --git a/src/intel/vulkan_hasvk/anv_blorp.c b/src/intel/vulkan_hasvk/anv_blorp.c index d375a8be95d..421ce1e164e 100644 --- a/src/intel/vulkan_hasvk/anv_blorp.c +++ b/src/intel/vulkan_hasvk/anv_blorp.c @@ -1786,8 +1786,7 @@ anv_image_mcs_op(struct anv_cmd_buffer *cmd_buffer, struct blorp_batch batch; anv_blorp_batch_init(cmd_buffer, &batch, - BLORP_BATCH_PREDICATE_ENABLE * predicate + - BLORP_BATCH_NO_UPDATE_CLEAR_COLOR); + BLORP_BATCH_PREDICATE_ENABLE * predicate); assert((batch.flags & BLORP_BATCH_USE_COMPUTE) == 0); struct blorp_surf surf; @@ -1876,8 +1875,7 @@ anv_image_ccs_op(struct anv_cmd_buffer *cmd_buffer, struct blorp_batch batch; anv_blorp_batch_init(cmd_buffer, &batch, - BLORP_BATCH_PREDICATE_ENABLE * predicate + - BLORP_BATCH_NO_UPDATE_CLEAR_COLOR); + BLORP_BATCH_PREDICATE_ENABLE * predicate); assert((batch.flags & BLORP_BATCH_USE_COMPUTE) == 0); struct blorp_surf surf;