From 9ab2a92f27e1e61a0402acc26980b53b5fbcaa97 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sun, 16 Jul 2023 07:40:42 -0400 Subject: [PATCH] radeonsi: split direct pm4 emission from si_pm4_emit si_pm4_emit_state will be changed. Reviewed-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeonsi/si_cp_reg_shadowing.c | 4 ++-- src/gallium/drivers/radeonsi/si_pm4.c | 13 +++++++++++-- src/gallium/drivers/radeonsi/si_pm4.h | 3 ++- src/gallium/drivers/radeonsi/si_state_draw.cpp | 2 +- 4 files changed, 16 insertions(+), 6 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_cp_reg_shadowing.c b/src/gallium/drivers/radeonsi/si_cp_reg_shadowing.c index aaae69f6e27..eae44acf414 100644 --- a/src/gallium/drivers/radeonsi/si_cp_reg_shadowing.c +++ b/src/gallium/drivers/radeonsi/si_cp_reg_shadowing.c @@ -74,12 +74,12 @@ void si_init_cp_reg_shadowing(struct si_context *sctx) if (sctx->shadowing.csa) radeon_add_to_buffer_list(sctx, &sctx->gfx_cs, sctx->shadowing.csa, RADEON_USAGE_READWRITE | RADEON_PRIO_DESCRIPTORS); - si_pm4_emit(sctx, shadowing_preamble); + si_pm4_emit_commands(sctx, shadowing_preamble); ac_emulate_clear_state(&sctx->screen->info, &sctx->gfx_cs, si_set_context_reg_array); /* TODO: Gfx11 fails GLCTS if we don't re-emit the preamble at the beginning of every IB. */ if (sctx->gfx_level < GFX11) { - si_pm4_emit(sctx, sctx->cs_preamble_state); + si_pm4_emit_commands(sctx, sctx->cs_preamble_state); /* The register values are shadowed, so we won't need to set them again. */ si_pm4_free_state(sctx, sctx->cs_preamble_state, ~0); diff --git a/src/gallium/drivers/radeonsi/si_pm4.c b/src/gallium/drivers/radeonsi/si_pm4.c index 5fe6f724ffb..d3542abe400 100644 --- a/src/gallium/drivers/radeonsi/si_pm4.c +++ b/src/gallium/drivers/radeonsi/si_pm4.c @@ -323,12 +323,21 @@ void si_pm4_free_state(struct si_context *sctx, struct si_pm4_state *state, unsi FREE(state); } -void si_pm4_emit(struct si_context *sctx, struct si_pm4_state *state) +void si_pm4_emit_commands(struct si_context *sctx, struct si_pm4_state *state) +{ + struct radeon_cmdbuf *cs = &sctx->gfx_cs; + + radeon_begin(cs); + radeon_emit_array(state->pm4, state->ndw); + radeon_end(); +} + +void si_pm4_emit_state(struct si_context *sctx, struct si_pm4_state *state) { struct radeon_cmdbuf *cs = &sctx->gfx_cs; if (state->is_shader) { - radeon_add_to_buffer_list(sctx, &sctx->gfx_cs, ((struct si_shader*)state)->bo, + radeon_add_to_buffer_list(sctx, cs, ((struct si_shader*)state)->bo, RADEON_USAGE_READ | RADEON_PRIO_SHADER_BINARY); } diff --git a/src/gallium/drivers/radeonsi/si_pm4.h b/src/gallium/drivers/radeonsi/si_pm4.h index 3d4d2277027..2483dea9ad6 100644 --- a/src/gallium/drivers/radeonsi/si_pm4.h +++ b/src/gallium/drivers/radeonsi/si_pm4.h @@ -61,7 +61,8 @@ void si_pm4_clear_state(struct si_pm4_state *state, struct si_screen *sscreen, bool is_compute_queue); void si_pm4_free_state(struct si_context *sctx, struct si_pm4_state *state, unsigned idx); -void si_pm4_emit(struct si_context *sctx, struct si_pm4_state *state); +void si_pm4_emit_commands(struct si_context *sctx, struct si_pm4_state *state); +void si_pm4_emit_state(struct si_context *sctx, struct si_pm4_state *state); void si_pm4_reset_emitted(struct si_context *sctx); struct si_pm4_state *si_pm4_create_sized(struct si_screen *sscreen, unsigned max_dw, bool is_compute_queue); diff --git a/src/gallium/drivers/radeonsi/si_state_draw.cpp b/src/gallium/drivers/radeonsi/si_state_draw.cpp index 0a816a1715c..0c7250a3933 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.cpp +++ b/src/gallium/drivers/radeonsi/si_state_draw.cpp @@ -1959,7 +1959,7 @@ static void si_emit_all_states(struct si_context *sctx, unsigned skip_atom_mask) /* All places should unset dirty_states if this doesn't pass. */ assert(state && state != sctx->emitted.array[i]); - si_pm4_emit(sctx, state); + si_pm4_emit_state(sctx, state); sctx->emitted.array[i] = state; } while (mask);