From 9803c1aa1004ce2c2ee11ecbc92dcbfdce5611e7 Mon Sep 17 00:00:00 2001 From: Connor Abbott Date: Thu, 14 Oct 2021 15:46:31 +0200 Subject: [PATCH] tu: Remove cross-check scaffolding Part-of: --- src/freedreno/fdl/fd6_view.c | 1 - src/freedreno/vulkan/tu_clear_blit.c | 18 -- src/freedreno/vulkan/tu_image.c | 239 +-------------------------- 3 files changed, 2 insertions(+), 256 deletions(-) diff --git a/src/freedreno/fdl/fd6_view.c b/src/freedreno/fdl/fd6_view.c index 7ee57f2307e..5806b1682d4 100644 --- a/src/freedreno/fdl/fd6_view.c +++ b/src/freedreno/fdl/fd6_view.c @@ -108,7 +108,6 @@ void fdl6_view_init(struct fdl6_view *view, const struct fdl_layout **layouts, const struct fdl_view_args *args, bool has_z24uint_s8uint) { - memset(view, 0, sizeof(*view)); const struct fdl_layout *layout = layouts[0]; uint32_t width = u_minify(layout->width0, args->base_miplevel); uint32_t height = u_minify(layout->height0, args->base_miplevel); diff --git a/src/freedreno/vulkan/tu_clear_blit.c b/src/freedreno/vulkan/tu_clear_blit.c index db6ecd2cc72..f5690477af5 100644 --- a/src/freedreno/vulkan/tu_clear_blit.c +++ b/src/freedreno/vulkan/tu_clear_blit.c @@ -1262,22 +1262,6 @@ tu_image_view_copy_blit(struct fdl6_view *iview, aspect_mask = VK_IMAGE_ASPECT_COLOR_BIT; } - struct tu_image_view iview2; - tu_image_view_init(&iview2, &(VkImageViewCreateInfo) { - .image = tu_image_to_handle(image), - .viewType = z_scale ? VK_IMAGE_VIEW_TYPE_3D : VK_IMAGE_VIEW_TYPE_2D, - .format = format, - /* image_to_buffer from d24s8 with stencil aspect mask writes out to r8 */ - .components.r = stencil_read ? VK_COMPONENT_SWIZZLE_A : VK_COMPONENT_SWIZZLE_R, - .subresourceRange = { - .aspectMask = aspect_mask, - .baseMipLevel = subres->mipLevel, - .levelCount = 1, - .baseArrayLayer = subres->baseArrayLayer + layer, - .layerCount = 1, - }, - }, false); - const struct fdl_layout *layout = &image->layout[tu6_plane_index(image->vk_format, aspect_mask)]; @@ -1299,8 +1283,6 @@ tu_image_view_copy_blit(struct fdl6_view *iview, }, .type = z_scale ? FDL_VIEW_TYPE_3D : FDL_VIEW_TYPE_2D, }, false); - - assert(memcmp(iview, &iview2.view, sizeof(iview2.view)) == 0); } static void diff --git a/src/freedreno/vulkan/tu_image.c b/src/freedreno/vulkan/tu_image.c index ccb7a4f825f..dd7bcd832b8 100644 --- a/src/freedreno/vulkan/tu_image.c +++ b/src/freedreno/vulkan/tu_image.c @@ -297,250 +297,15 @@ tu_image_view_init(struct tu_image_view *iview, args.chroma_offsets[1] = (enum fdl_chroma_location) conversion->chroma_offsets[1]; } - struct fdl6_view temp_view; - fdl6_view_init(&temp_view, layouts, &args, has_z24uint_s8uint); - - memset(&iview->view, 0, sizeof(iview->view)); - - memset(iview->view.descriptor, 0, sizeof(iview->view.descriptor)); - - const struct fdl_layout *layout = layouts[0]; - - uint32_t width = u_minify(layout->width0, range->baseMipLevel); - uint32_t height = u_minify(layout->height0, range->baseMipLevel); - uint32_t storage_depth = tu_get_layerCount(image, range); - if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) { - storage_depth = u_minify(image->layout[0].depth0, range->baseMipLevel); - } - - uint32_t depth = storage_depth; - if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE || - pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) { - /* Cubes are treated as 2D arrays for storage images, so only divide the - * depth by 6 for the texture descriptor. - */ - depth /= 6; - } - - uint64_t base_addr = image->bo->iova + image->bo_offset + - fdl_surface_offset(layout, range->baseMipLevel, range->baseArrayLayer); - uint64_t ubwc_addr = image->bo->iova + image->bo_offset + - fdl_ubwc_offset(layout, range->baseMipLevel, range->baseArrayLayer); - - uint32_t pitch = fdl_pitch(layout, range->baseMipLevel); - uint32_t ubwc_pitch = fdl_ubwc_pitch(layout, range->baseMipLevel); - uint32_t layer_size = fdl_layer_stride(layout, range->baseMipLevel); - - if (aspect_mask != VK_IMAGE_ASPECT_COLOR_BIT) - format = tu6_plane_format(format, tu6_plane_index(format, aspect_mask)); - - struct tu_native_format fmt = tu6_format_texture(format, layout->tile_mode); - /* note: freedreno layout assumes no TILE_ALL bit for non-UBWC color formats - * this means smaller mipmap levels have a linear tile mode. - * Depth/stencil formats have non-linear tile mode. - */ - fmt.tile_mode = fdl_tile_mode(layout, range->baseMipLevel); - - bool ubwc_enabled = fdl_ubwc_enabled(layout, range->baseMipLevel); - - bool is_d24s8 = (format == VK_FORMAT_D24_UNORM_S8_UINT || - format == VK_FORMAT_X8_D24_UNORM_PACK32); - - if (is_d24s8 && ubwc_enabled) - fmt.fmt = FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8; - - unsigned fmt_tex = fmt.fmt; - if (is_d24s8) { - if (aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT) - fmt_tex = FMT6_Z24_UNORM_S8_UINT; - if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) - fmt_tex = has_z24uint_s8uint ? FMT6_Z24_UINT_S8_UINT : FMT6_8_8_8_8_UINT; - /* TODO: also use this format with storage descriptor ? */ - } - - iview->view.descriptor[0] = - A6XX_TEX_CONST_0_TILE_MODE(fmt.tile_mode) | - COND(vk_format_is_srgb(format), A6XX_TEX_CONST_0_SRGB) | - A6XX_TEX_CONST_0_FMT(fmt_tex) | - A6XX_TEX_CONST_0_SAMPLES(tu_msaa_samples(layout->nr_samples)) | - A6XX_TEX_CONST_0_SWAP(fmt.swap) | - tu6_texswiz(&pCreateInfo->components, conversion, format, aspect_mask, has_z24uint_s8uint) | - A6XX_TEX_CONST_0_MIPLVLS(tu_get_levelCount(image, range) - 1); - iview->view.descriptor[1] = A6XX_TEX_CONST_1_WIDTH(width) | A6XX_TEX_CONST_1_HEIGHT(height); - iview->view.descriptor[2] = - A6XX_TEX_CONST_2_PITCHALIGN(layout->pitchalign - 6) | - A6XX_TEX_CONST_2_PITCH(pitch) | - A6XX_TEX_CONST_2_TYPE(tu6_tex_type(pCreateInfo->viewType, false)); - iview->view.descriptor[3] = A6XX_TEX_CONST_3_ARRAY_PITCH(layer_size); - iview->view.descriptor[4] = base_addr; - iview->view.descriptor[5] = (base_addr >> 32) | A6XX_TEX_CONST_5_DEPTH(depth); - - if (layout->tile_all) - iview->view.descriptor[3] |= A6XX_TEX_CONST_3_TILE_ALL; - - if (format == VK_FORMAT_G8_B8R8_2PLANE_420_UNORM || - format == VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM) { - /* chroma offset re-uses MIPLVLS bits */ - assert(tu_get_levelCount(image, range) == 1); - if (conversion) { - if (conversion->chroma_offsets[0] == VK_CHROMA_LOCATION_MIDPOINT) - iview->view.descriptor[0] |= A6XX_TEX_CONST_0_CHROMA_MIDPOINT_X; - if (conversion->chroma_offsets[1] == VK_CHROMA_LOCATION_MIDPOINT) - iview->view.descriptor[0] |= A6XX_TEX_CONST_0_CHROMA_MIDPOINT_Y; - } - - uint64_t base_addr[3]; - - iview->view.descriptor[3] |= A6XX_TEX_CONST_3_TILE_ALL; - if (ubwc_enabled) { - iview->view.descriptor[3] |= A6XX_TEX_CONST_3_FLAG; - /* no separate ubwc base, image must have the expected layout */ - for (uint32_t i = 0; i < 3; i++) { - base_addr[i] = image->bo->iova + image->bo_offset + - fdl_ubwc_offset(&image->layout[i], range->baseMipLevel, range->baseArrayLayer); - } - } else { - for (uint32_t i = 0; i < 3; i++) { - base_addr[i] = image->bo->iova + image->bo_offset + - fdl_surface_offset(&image->layout[i], range->baseMipLevel, range->baseArrayLayer); - } - } - - iview->view.descriptor[4] = base_addr[0]; - iview->view.descriptor[5] |= base_addr[0] >> 32; - iview->view.descriptor[6] = - A6XX_TEX_CONST_6_PLANE_PITCH(fdl_pitch(&image->layout[1], range->baseMipLevel)); - iview->view.descriptor[7] = base_addr[1]; - iview->view.descriptor[8] = base_addr[1] >> 32; - iview->view.descriptor[9] = base_addr[2]; - iview->view.descriptor[10] = base_addr[2] >> 32; - - assert(pCreateInfo->viewType != VK_IMAGE_VIEW_TYPE_3D); - assert(memcmp(&temp_view, &iview->view, sizeof(temp_view)) == 0); - return; - } - - if (ubwc_enabled) { - uint32_t block_width, block_height; - fdl6_get_ubwc_blockwidth(layout, &block_width, &block_height); - - iview->view.descriptor[3] |= A6XX_TEX_CONST_3_FLAG; - iview->view.descriptor[7] = ubwc_addr; - iview->view.descriptor[8] = ubwc_addr >> 32; - iview->view.descriptor[9] |= A6XX_TEX_CONST_9_FLAG_BUFFER_ARRAY_PITCH(layout->ubwc_layer_size >> 2); - iview->view.descriptor[10] |= - A6XX_TEX_CONST_10_FLAG_BUFFER_PITCH(ubwc_pitch) | - A6XX_TEX_CONST_10_FLAG_BUFFER_LOGW(util_logbase2_ceil(DIV_ROUND_UP(width, block_width))) | - A6XX_TEX_CONST_10_FLAG_BUFFER_LOGH(util_logbase2_ceil(DIV_ROUND_UP(height, block_height))); - } - - if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) { - iview->view.descriptor[3] |= - A6XX_TEX_CONST_3_MIN_LAYERSZ(layout->slices[image->level_count - 1].size0); - } - - iview->view.SP_PS_2D_SRC_INFO = A6XX_SP_PS_2D_SRC_INFO( - .color_format = fmt.fmt, - .tile_mode = fmt.tile_mode, - .color_swap = fmt.swap, - .flags = ubwc_enabled, - .srgb = vk_format_is_srgb(format), - .samples = tu_msaa_samples(layout->nr_samples), - .samples_average = layout->nr_samples > 1 && - !vk_format_is_int(format) && - !vk_format_is_depth_or_stencil(format), - .unk20 = 1, - .unk22 = 1).value; - iview->view.SP_PS_2D_SRC_SIZE = - A6XX_SP_PS_2D_SRC_SIZE(.width = width, .height = height).value; - - /* note: these have same encoding for MRT and 2D (except 2D PITCH src) */ - iview->view.PITCH = A6XX_RB_DEPTH_BUFFER_PITCH(pitch).value; - iview->view.FLAG_BUFFER_PITCH = A6XX_RB_DEPTH_FLAG_BUFFER_PITCH( - .pitch = ubwc_pitch, .array_pitch = layout->ubwc_layer_size >> 2).value; - - iview->view.base_addr = base_addr; - iview->view.ubwc_addr = ubwc_addr; - iview->view.layer_size = layer_size; - iview->view.ubwc_layer_size = layout->ubwc_layer_size; - - /* Don't set fields that are only used for attachments/blit dest if COLOR - * is unsupported. - */ - if (!tu6_format_color_supported(format)) - return; - - struct tu_native_format cfmt = tu6_format_color(format, layout->tile_mode); - cfmt.tile_mode = fmt.tile_mode; - - if (is_d24s8 && ubwc_enabled) - cfmt.fmt = FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8; - - memset(iview->view.storage_descriptor, 0, sizeof(iview->view.storage_descriptor)); - - iview->view.storage_descriptor[0] = - A6XX_IBO_0_FMT(fmt.fmt) | - A6XX_IBO_0_TILE_MODE(fmt.tile_mode); - iview->view.storage_descriptor[1] = - A6XX_IBO_1_WIDTH(width) | - A6XX_IBO_1_HEIGHT(height); - iview->view.storage_descriptor[2] = - A6XX_IBO_2_PITCH(pitch) | - A6XX_IBO_2_TYPE(tu6_tex_type(pCreateInfo->viewType, true)); - iview->view.storage_descriptor[3] = A6XX_IBO_3_ARRAY_PITCH(layer_size); - - iview->view.storage_descriptor[4] = base_addr; - iview->view.storage_descriptor[5] = (base_addr >> 32) | A6XX_IBO_5_DEPTH(storage_depth); - - if (ubwc_enabled) { - iview->view.storage_descriptor[3] |= A6XX_IBO_3_FLAG | A6XX_IBO_3_UNK27; - iview->view.storage_descriptor[7] |= ubwc_addr; - iview->view.storage_descriptor[8] |= ubwc_addr >> 32; - iview->view.storage_descriptor[9] = A6XX_IBO_9_FLAG_BUFFER_ARRAY_PITCH(layout->ubwc_layer_size >> 2); - iview->view.storage_descriptor[10] = - A6XX_IBO_10_FLAG_BUFFER_PITCH(ubwc_pitch); - } - - iview->view.width = width; - iview->view.height = height; - iview->view.need_y2_align = - (fmt.tile_mode == TILE6_LINEAR && range->baseMipLevel != image->level_count - 1); - - iview->view.ubwc_enabled = ubwc_enabled; - - iview->view.RB_MRT_BUF_INFO = A6XX_RB_MRT_BUF_INFO(0, - .color_tile_mode = cfmt.tile_mode, - .color_format = cfmt.fmt, - .color_swap = cfmt.swap).value; - - iview->view.SP_FS_MRT_REG = A6XX_SP_FS_MRT_REG(0, - .color_format = cfmt.fmt, - .color_sint = vk_format_is_sint(format), - .color_uint = vk_format_is_uint(format)).value; - - iview->view.RB_2D_DST_INFO = A6XX_RB_2D_DST_INFO( - .color_format = cfmt.fmt, - .tile_mode = cfmt.tile_mode, - .color_swap = cfmt.swap, - .flags = ubwc_enabled, - .srgb = vk_format_is_srgb(format)).value; - - iview->view.RB_BLIT_DST_INFO = A6XX_RB_BLIT_DST_INFO( - .tile_mode = cfmt.tile_mode, - .samples = tu_msaa_samples(layout->nr_samples), - .color_format = cfmt.fmt, - .color_swap = cfmt.swap, - .flags = ubwc_enabled).value; + fdl6_view_init(&iview->view, layouts, &args, has_z24uint_s8uint); if (image->vk_format == VK_FORMAT_D32_SFLOAT_S8_UINT) { - layout = &image->layout[1]; + struct fdl_layout *layout = &image->layout[1]; iview->stencil_base_addr = image->bo->iova + image->bo_offset + fdl_surface_offset(layout, range->baseMipLevel, range->baseArrayLayer); iview->stencil_layer_size = fdl_layer_stride(layout, range->baseMipLevel); iview->stencil_PITCH = A6XX_RB_STENCIL_BUFFER_PITCH(fdl_pitch(layout, range->baseMipLevel)).value; } - - assert(memcmp(&temp_view, &iview->view, sizeof(temp_view)) == 0); } bool