From 97a13d6424e788094fd7568c5673f2f7da4e497f Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 23 Mar 2022 17:20:33 -0400 Subject: [PATCH] pan/bi: Augment ST_TILE with register format To model its Valhall incarnation. Signed-off-by: Alyssa Rosenzweig Part-of: --- src/panfrost/bifrost/ISA.xml | 6 ++++++ src/panfrost/bifrost/bifrost_compile.c | 3 ++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/src/panfrost/bifrost/ISA.xml b/src/panfrost/bifrost/ISA.xml index c4a8c941740..0232347ac00 100644 --- a/src/panfrost/bifrost/ISA.xml +++ b/src/panfrost/bifrost/ISA.xml @@ -7709,6 +7709,12 @@ v3 v4 + + f32 + f16 + u32 + s32 + diff --git a/src/panfrost/bifrost/bifrost_compile.c b/src/panfrost/bifrost/bifrost_compile.c index fd7d2f10879..d168648cbb1 100644 --- a/src/panfrost/bifrost/bifrost_compile.c +++ b/src/panfrost/bifrost/bifrost_compile.c @@ -523,7 +523,8 @@ bi_emit_blend_op(bi_builder *b, bi_index rgba, nir_alu_type T, /* Conversion descriptor comes from the compile inputs, pixel * indices derived at run time based on sample ID */ bi_st_tile(b, rgba, bi_pixel_indices(b, rt), bi_register(60), - bi_imm_u32(blend_desc >> 32), BI_VECSIZE_V4); + bi_imm_u32(blend_desc >> 32), + regfmt, BI_VECSIZE_V4); } else if (b->shader->inputs->is_blend) { /* Blend descriptor comes from the compile inputs */ /* Put the result in r0 */