From 96332b3433be8fe857589cd50e963d2ac5516507 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Tue, 29 Nov 2022 10:05:48 +0100 Subject: [PATCH] radv: stop emitting R_00B8A0_COMPUTE_PGM_RSRC3 from the CS preamble MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It will be always emitted as part of the compute pipeline. Signed-off-by: Samuel Pitoiset Reviewed-by: Timur Kristóf Reviewed-by: Bas Nieuwenhuizen Part-of: --- src/amd/vulkan/si_cmd_buffer.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index 26bd2dd08d2..538a4e1e088 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -112,12 +112,11 @@ si_emit_compute(struct radv_device *device, struct radeon_cmdbuf *cs) } if (device->physical_device->rad_info.gfx_level >= GFX10) { - radeon_set_sh_reg_seq(cs, R_00B890_COMPUTE_USER_ACCUM_0, 5); + radeon_set_sh_reg_seq(cs, R_00B890_COMPUTE_USER_ACCUM_0, 4); radeon_emit(cs, 0); /* R_00B890_COMPUTE_USER_ACCUM_0 */ radeon_emit(cs, 0); /* R_00B894_COMPUTE_USER_ACCUM_1 */ radeon_emit(cs, 0); /* R_00B898_COMPUTE_USER_ACCUM_2 */ radeon_emit(cs, 0); /* R_00B89C_COMPUTE_USER_ACCUM_3 */ - radeon_emit(cs, 0); /* R_00B8A0_COMPUTE_PGM_RSRC3 */ } /* This register has been moved to R_00CD20_COMPUTE_MAX_WAVE_ID