From 952a523abb20c19ad42ff37ed04e2e10d6724309 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Sat, 13 May 2023 02:22:47 +0300 Subject: [PATCH] intel: switch over to unified atomics Signed-off-by: Lionel Landwerlin Reviewed-by: Jesse Natalie Reviewed-by: Rohan Garg Part-of: --- src/gallium/drivers/crocus/crocus_program.c | 66 +++----------- src/gallium/drivers/iris/iris_program.c | 90 +++---------------- src/intel/compiler/brw_fs_nir.cpp | 83 +++-------------- src/intel/compiler/brw_nir.c | 57 +++++------- .../compiler/brw_nir_analyze_ubo_ranges.c | 12 +-- .../compiler/brw_nir_lower_storage_image.c | 12 +-- src/intel/compiler/brw_vec4_nir.cpp | 12 +-- .../vulkan/anv_nir_apply_pipeline_layout.c | 42 ++------- .../anv_nir_apply_pipeline_layout.c | 42 ++------- 9 files changed, 76 insertions(+), 340 deletions(-) diff --git a/src/gallium/drivers/crocus/crocus_program.c b/src/gallium/drivers/crocus/crocus_program.c index 4cd02e98bd4..2d655d4ed14 100644 --- a/src/gallium/drivers/crocus/crocus_program.c +++ b/src/gallium/drivers/crocus/crocus_program.c @@ -291,16 +291,8 @@ crocus_lower_storage_image_derefs(nir_shader *nir) switch (intrin->intrinsic) { case nir_intrinsic_image_deref_load: case nir_intrinsic_image_deref_store: - case nir_intrinsic_image_deref_atomic_add: - case nir_intrinsic_image_deref_atomic_imin: - case nir_intrinsic_image_deref_atomic_umin: - case nir_intrinsic_image_deref_atomic_imax: - case nir_intrinsic_image_deref_atomic_umax: - case nir_intrinsic_image_deref_atomic_and: - case nir_intrinsic_image_deref_atomic_or: - case nir_intrinsic_image_deref_atomic_xor: - case nir_intrinsic_image_deref_atomic_exchange: - case nir_intrinsic_image_deref_atomic_comp_swap: + case nir_intrinsic_image_deref_atomic: + case nir_intrinsic_image_deref_atomic_swap: case nir_intrinsic_image_deref_size: case nir_intrinsic_image_deref_samples: case nir_intrinsic_image_deref_load_raw_intel: @@ -923,16 +915,8 @@ crocus_setup_binding_table(const struct intel_device_info *devinfo, case nir_intrinsic_image_size: case nir_intrinsic_image_load: case nir_intrinsic_image_store: - case nir_intrinsic_image_atomic_add: - case nir_intrinsic_image_atomic_imin: - case nir_intrinsic_image_atomic_umin: - case nir_intrinsic_image_atomic_imax: - case nir_intrinsic_image_atomic_umax: - case nir_intrinsic_image_atomic_and: - case nir_intrinsic_image_atomic_or: - case nir_intrinsic_image_atomic_xor: - case nir_intrinsic_image_atomic_exchange: - case nir_intrinsic_image_atomic_comp_swap: + case nir_intrinsic_image_atomic: + case nir_intrinsic_image_atomic_swap: case nir_intrinsic_image_load_raw_intel: case nir_intrinsic_image_store_raw_intel: mark_used_with_src(bt, &intrin->src[0], CROCUS_SURFACE_GROUP_IMAGE); @@ -947,19 +931,8 @@ crocus_setup_binding_table(const struct intel_device_info *devinfo, break; case nir_intrinsic_get_ssbo_size: - case nir_intrinsic_ssbo_atomic_add: - case nir_intrinsic_ssbo_atomic_imin: - case nir_intrinsic_ssbo_atomic_umin: - case nir_intrinsic_ssbo_atomic_imax: - case nir_intrinsic_ssbo_atomic_umax: - case nir_intrinsic_ssbo_atomic_and: - case nir_intrinsic_ssbo_atomic_or: - case nir_intrinsic_ssbo_atomic_xor: - case nir_intrinsic_ssbo_atomic_exchange: - case nir_intrinsic_ssbo_atomic_comp_swap: - case nir_intrinsic_ssbo_atomic_fmin: - case nir_intrinsic_ssbo_atomic_fmax: - case nir_intrinsic_ssbo_atomic_fcomp_swap: + case nir_intrinsic_ssbo_atomic: + case nir_intrinsic_ssbo_atomic_swap: case nir_intrinsic_load_ssbo: mark_used_with_src(bt, &intrin->src[0], CROCUS_SURFACE_GROUP_SSBO); break; @@ -1042,16 +1015,8 @@ crocus_setup_binding_table(const struct intel_device_info *devinfo, case nir_intrinsic_image_size: case nir_intrinsic_image_load: case nir_intrinsic_image_store: - case nir_intrinsic_image_atomic_add: - case nir_intrinsic_image_atomic_imin: - case nir_intrinsic_image_atomic_umin: - case nir_intrinsic_image_atomic_imax: - case nir_intrinsic_image_atomic_umax: - case nir_intrinsic_image_atomic_and: - case nir_intrinsic_image_atomic_or: - case nir_intrinsic_image_atomic_xor: - case nir_intrinsic_image_atomic_exchange: - case nir_intrinsic_image_atomic_comp_swap: + case nir_intrinsic_image_atomic: + case nir_intrinsic_image_atomic_swap: case nir_intrinsic_image_load_raw_intel: case nir_intrinsic_image_store_raw_intel: rewrite_src_with_bti(&b, bt, instr, &intrin->src[0], @@ -1076,19 +1041,8 @@ crocus_setup_binding_table(const struct intel_device_info *devinfo, break; case nir_intrinsic_get_ssbo_size: - case nir_intrinsic_ssbo_atomic_add: - case nir_intrinsic_ssbo_atomic_imin: - case nir_intrinsic_ssbo_atomic_umin: - case nir_intrinsic_ssbo_atomic_imax: - case nir_intrinsic_ssbo_atomic_umax: - case nir_intrinsic_ssbo_atomic_and: - case nir_intrinsic_ssbo_atomic_or: - case nir_intrinsic_ssbo_atomic_xor: - case nir_intrinsic_ssbo_atomic_exchange: - case nir_intrinsic_ssbo_atomic_comp_swap: - case nir_intrinsic_ssbo_atomic_fmin: - case nir_intrinsic_ssbo_atomic_fmax: - case nir_intrinsic_ssbo_atomic_fcomp_swap: + case nir_intrinsic_ssbo_atomic: + case nir_intrinsic_ssbo_atomic_swap: case nir_intrinsic_load_ssbo: rewrite_src_with_bti(&b, bt, instr, &intrin->src[0], CROCUS_SURFACE_GROUP_SSBO); diff --git a/src/gallium/drivers/iris/iris_program.c b/src/gallium/drivers/iris/iris_program.c index 96abc286504..1a6d4888f09 100644 --- a/src/gallium/drivers/iris/iris_program.c +++ b/src/gallium/drivers/iris/iris_program.c @@ -274,16 +274,8 @@ iris_lower_storage_image_derefs(nir_shader *nir) switch (intrin->intrinsic) { case nir_intrinsic_image_deref_load: case nir_intrinsic_image_deref_store: - case nir_intrinsic_image_deref_atomic_add: - case nir_intrinsic_image_deref_atomic_imin: - case nir_intrinsic_image_deref_atomic_umin: - case nir_intrinsic_image_deref_atomic_imax: - case nir_intrinsic_image_deref_atomic_umax: - case nir_intrinsic_image_deref_atomic_and: - case nir_intrinsic_image_deref_atomic_or: - case nir_intrinsic_image_deref_atomic_xor: - case nir_intrinsic_image_deref_atomic_exchange: - case nir_intrinsic_image_deref_atomic_comp_swap: + case nir_intrinsic_image_deref_atomic: + case nir_intrinsic_image_deref_atomic_swap: case nir_intrinsic_image_deref_size: case nir_intrinsic_image_deref_samples: case nir_intrinsic_image_deref_load_raw_intel: @@ -320,29 +312,13 @@ iris_uses_image_atomic(const nir_shader *shader) nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); switch (intrin->intrinsic) { - case nir_intrinsic_image_deref_atomic_add: - case nir_intrinsic_image_deref_atomic_imin: - case nir_intrinsic_image_deref_atomic_umin: - case nir_intrinsic_image_deref_atomic_imax: - case nir_intrinsic_image_deref_atomic_umax: - case nir_intrinsic_image_deref_atomic_and: - case nir_intrinsic_image_deref_atomic_or: - case nir_intrinsic_image_deref_atomic_xor: - case nir_intrinsic_image_deref_atomic_exchange: - case nir_intrinsic_image_deref_atomic_comp_swap: + case nir_intrinsic_image_deref_atomic: + case nir_intrinsic_image_deref_atomic_swap: unreachable("Should have been lowered in " "iris_lower_storage_image_derefs"); - case nir_intrinsic_image_atomic_add: - case nir_intrinsic_image_atomic_imin: - case nir_intrinsic_image_atomic_umin: - case nir_intrinsic_image_atomic_imax: - case nir_intrinsic_image_atomic_umax: - case nir_intrinsic_image_atomic_and: - case nir_intrinsic_image_atomic_or: - case nir_intrinsic_image_atomic_xor: - case nir_intrinsic_image_atomic_exchange: - case nir_intrinsic_image_atomic_comp_swap: + case nir_intrinsic_image_atomic: + case nir_intrinsic_image_atomic_swap: return true; default: @@ -1005,16 +981,8 @@ iris_setup_binding_table(const struct intel_device_info *devinfo, case nir_intrinsic_image_size: case nir_intrinsic_image_load: case nir_intrinsic_image_store: - case nir_intrinsic_image_atomic_add: - case nir_intrinsic_image_atomic_imin: - case nir_intrinsic_image_atomic_umin: - case nir_intrinsic_image_atomic_imax: - case nir_intrinsic_image_atomic_umax: - case nir_intrinsic_image_atomic_and: - case nir_intrinsic_image_atomic_or: - case nir_intrinsic_image_atomic_xor: - case nir_intrinsic_image_atomic_exchange: - case nir_intrinsic_image_atomic_comp_swap: + case nir_intrinsic_image_atomic: + case nir_intrinsic_image_atomic_swap: case nir_intrinsic_image_load_raw_intel: case nir_intrinsic_image_store_raw_intel: mark_used_with_src(bt, &intrin->src[0], IRIS_SURFACE_GROUP_IMAGE); @@ -1029,19 +997,8 @@ iris_setup_binding_table(const struct intel_device_info *devinfo, break; case nir_intrinsic_get_ssbo_size: - case nir_intrinsic_ssbo_atomic_add: - case nir_intrinsic_ssbo_atomic_imin: - case nir_intrinsic_ssbo_atomic_umin: - case nir_intrinsic_ssbo_atomic_imax: - case nir_intrinsic_ssbo_atomic_umax: - case nir_intrinsic_ssbo_atomic_and: - case nir_intrinsic_ssbo_atomic_or: - case nir_intrinsic_ssbo_atomic_xor: - case nir_intrinsic_ssbo_atomic_exchange: - case nir_intrinsic_ssbo_atomic_comp_swap: - case nir_intrinsic_ssbo_atomic_fmin: - case nir_intrinsic_ssbo_atomic_fmax: - case nir_intrinsic_ssbo_atomic_fcomp_swap: + case nir_intrinsic_ssbo_atomic: + case nir_intrinsic_ssbo_atomic_swap: case nir_intrinsic_load_ssbo: mark_used_with_src(bt, &intrin->src[0], IRIS_SURFACE_GROUP_SSBO); break; @@ -1106,16 +1063,8 @@ iris_setup_binding_table(const struct intel_device_info *devinfo, case nir_intrinsic_image_size: case nir_intrinsic_image_load: case nir_intrinsic_image_store: - case nir_intrinsic_image_atomic_add: - case nir_intrinsic_image_atomic_imin: - case nir_intrinsic_image_atomic_umin: - case nir_intrinsic_image_atomic_imax: - case nir_intrinsic_image_atomic_umax: - case nir_intrinsic_image_atomic_and: - case nir_intrinsic_image_atomic_or: - case nir_intrinsic_image_atomic_xor: - case nir_intrinsic_image_atomic_exchange: - case nir_intrinsic_image_atomic_comp_swap: + case nir_intrinsic_image_atomic: + case nir_intrinsic_image_atomic_swap: case nir_intrinsic_image_load_raw_intel: case nir_intrinsic_image_store_raw_intel: rewrite_src_with_bti(&b, bt, instr, &intrin->src[0], @@ -1140,19 +1089,8 @@ iris_setup_binding_table(const struct intel_device_info *devinfo, break; case nir_intrinsic_get_ssbo_size: - case nir_intrinsic_ssbo_atomic_add: - case nir_intrinsic_ssbo_atomic_imin: - case nir_intrinsic_ssbo_atomic_umin: - case nir_intrinsic_ssbo_atomic_imax: - case nir_intrinsic_ssbo_atomic_umax: - case nir_intrinsic_ssbo_atomic_and: - case nir_intrinsic_ssbo_atomic_or: - case nir_intrinsic_ssbo_atomic_xor: - case nir_intrinsic_ssbo_atomic_exchange: - case nir_intrinsic_ssbo_atomic_comp_swap: - case nir_intrinsic_ssbo_atomic_fmin: - case nir_intrinsic_ssbo_atomic_fmax: - case nir_intrinsic_ssbo_atomic_fcomp_swap: + case nir_intrinsic_ssbo_atomic: + case nir_intrinsic_ssbo_atomic_swap: case nir_intrinsic_load_ssbo: rewrite_src_with_bti(&b, bt, instr, &intrin->src[0], IRIS_SURFACE_GROUP_SSBO); diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index a6a262379e3..fa989092fcc 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -3683,19 +3683,8 @@ fs_visitor::nir_emit_cs_intrinsic(const fs_builder &bld, break; } - case nir_intrinsic_shared_atomic_add: - case nir_intrinsic_shared_atomic_imin: - case nir_intrinsic_shared_atomic_umin: - case nir_intrinsic_shared_atomic_imax: - case nir_intrinsic_shared_atomic_umax: - case nir_intrinsic_shared_atomic_and: - case nir_intrinsic_shared_atomic_or: - case nir_intrinsic_shared_atomic_xor: - case nir_intrinsic_shared_atomic_exchange: - case nir_intrinsic_shared_atomic_comp_swap: - case nir_intrinsic_shared_atomic_fmin: - case nir_intrinsic_shared_atomic_fmax: - case nir_intrinsic_shared_atomic_fcomp_swap: + case nir_intrinsic_shared_atomic: + case nir_intrinsic_shared_atomic_swap: nir_emit_surface_atomic(bld, instr, brw_imm_ud(GFX7_BTI_SLM)); break; @@ -4111,28 +4100,12 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr switch (instr->intrinsic) { case nir_intrinsic_image_load: case nir_intrinsic_image_store: - case nir_intrinsic_image_atomic_add: - case nir_intrinsic_image_atomic_imin: - case nir_intrinsic_image_atomic_umin: - case nir_intrinsic_image_atomic_imax: - case nir_intrinsic_image_atomic_umax: - case nir_intrinsic_image_atomic_and: - case nir_intrinsic_image_atomic_or: - case nir_intrinsic_image_atomic_xor: - case nir_intrinsic_image_atomic_exchange: - case nir_intrinsic_image_atomic_comp_swap: + case nir_intrinsic_image_atomic: + case nir_intrinsic_image_atomic_swap: case nir_intrinsic_bindless_image_load: case nir_intrinsic_bindless_image_store: - case nir_intrinsic_bindless_image_atomic_add: - case nir_intrinsic_bindless_image_atomic_imin: - case nir_intrinsic_bindless_image_atomic_umin: - case nir_intrinsic_bindless_image_atomic_imax: - case nir_intrinsic_bindless_image_atomic_umax: - case nir_intrinsic_bindless_image_atomic_and: - case nir_intrinsic_bindless_image_atomic_or: - case nir_intrinsic_bindless_image_atomic_xor: - case nir_intrinsic_bindless_image_atomic_exchange: - case nir_intrinsic_bindless_image_atomic_comp_swap: { + case nir_intrinsic_bindless_image_atomic: + case nir_intrinsic_bindless_image_atomic_swap: { /* Get some metadata from the image intrinsic. */ const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; @@ -4141,16 +4114,8 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr switch (instr->intrinsic) { case nir_intrinsic_image_load: case nir_intrinsic_image_store: - case nir_intrinsic_image_atomic_add: - case nir_intrinsic_image_atomic_imin: - case nir_intrinsic_image_atomic_umin: - case nir_intrinsic_image_atomic_imax: - case nir_intrinsic_image_atomic_umax: - case nir_intrinsic_image_atomic_and: - case nir_intrinsic_image_atomic_or: - case nir_intrinsic_image_atomic_xor: - case nir_intrinsic_image_atomic_exchange: - case nir_intrinsic_image_atomic_comp_swap: + case nir_intrinsic_image_atomic: + case nir_intrinsic_image_atomic_swap: srcs[SURFACE_LOGICAL_SRC_SURFACE] = get_nir_image_intrinsic_image(bld, instr); break; @@ -4805,20 +4770,8 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr break; } - case nir_intrinsic_global_atomic_add: - case nir_intrinsic_global_atomic_imin: - case nir_intrinsic_global_atomic_umin: - case nir_intrinsic_global_atomic_imax: - case nir_intrinsic_global_atomic_umax: - case nir_intrinsic_global_atomic_and: - case nir_intrinsic_global_atomic_or: - case nir_intrinsic_global_atomic_xor: - case nir_intrinsic_global_atomic_exchange: - case nir_intrinsic_global_atomic_comp_swap: - case nir_intrinsic_global_atomic_fadd: - case nir_intrinsic_global_atomic_fmin: - case nir_intrinsic_global_atomic_fmax: - case nir_intrinsic_global_atomic_fcomp_swap: + case nir_intrinsic_global_atomic: + case nir_intrinsic_global_atomic_swap: nir_emit_global_atomic(bld, instr); break; @@ -5033,20 +4986,8 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr break; } - case nir_intrinsic_ssbo_atomic_add: - case nir_intrinsic_ssbo_atomic_imin: - case nir_intrinsic_ssbo_atomic_umin: - case nir_intrinsic_ssbo_atomic_imax: - case nir_intrinsic_ssbo_atomic_umax: - case nir_intrinsic_ssbo_atomic_and: - case nir_intrinsic_ssbo_atomic_or: - case nir_intrinsic_ssbo_atomic_xor: - case nir_intrinsic_ssbo_atomic_exchange: - case nir_intrinsic_ssbo_atomic_comp_swap: - case nir_intrinsic_ssbo_atomic_fadd: - case nir_intrinsic_ssbo_atomic_fmin: - case nir_intrinsic_ssbo_atomic_fmax: - case nir_intrinsic_ssbo_atomic_fcomp_swap: + case nir_intrinsic_ssbo_atomic: + case nir_intrinsic_ssbo_atomic_swap: nir_emit_surface_atomic(bld, instr, get_nir_ssbo_intrinsic_index(bld, instr)); break; diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index 5d48dd427d4..a507c62a5d4 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -932,6 +932,8 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir, OPT(nir_lower_frexp); + OPT(nir_lower_legacy_atomics); + if (is_scalar) { OPT(nir_lower_alu_to_scalar, NULL, NULL); } @@ -1897,26 +1899,19 @@ brw_cmod_for_nir_comparison(nir_op op) enum lsc_opcode lsc_aop_for_nir_intrinsic(const nir_intrinsic_instr *atomic) { - switch (atomic->intrinsic) { -#define AOP_CASE(atom) \ - case nir_intrinsic_image_atomic_##atom: \ - case nir_intrinsic_bindless_image_atomic_##atom: \ - case nir_intrinsic_ssbo_atomic_##atom: \ - case nir_intrinsic_shared_atomic_##atom: \ - case nir_intrinsic_global_atomic_##atom - - AOP_CASE(add): { + switch (nir_intrinsic_atomic_op(atomic)) { + case nir_atomic_op_iadd: { unsigned src_idx; switch (atomic->intrinsic) { - case nir_intrinsic_image_atomic_add: - case nir_intrinsic_bindless_image_atomic_add: + case nir_intrinsic_image_atomic: + case nir_intrinsic_bindless_image_atomic: src_idx = 3; break; - case nir_intrinsic_ssbo_atomic_add: + case nir_intrinsic_ssbo_atomic: src_idx = 2; break; - case nir_intrinsic_shared_atomic_add: - case nir_intrinsic_global_atomic_add: + case nir_intrinsic_shared_atomic: + case nir_intrinsic_global_atomic: src_idx = 1; break; default: @@ -1933,28 +1928,20 @@ lsc_aop_for_nir_intrinsic(const nir_intrinsic_instr *atomic) return LSC_OP_ATOMIC_ADD; } - AOP_CASE(imin): return LSC_OP_ATOMIC_MIN; - AOP_CASE(umin): return LSC_OP_ATOMIC_UMIN; - AOP_CASE(imax): return LSC_OP_ATOMIC_MAX; - AOP_CASE(umax): return LSC_OP_ATOMIC_UMAX; - AOP_CASE(and): return LSC_OP_ATOMIC_AND; - AOP_CASE(or): return LSC_OP_ATOMIC_OR; - AOP_CASE(xor): return LSC_OP_ATOMIC_XOR; - AOP_CASE(exchange): return LSC_OP_ATOMIC_STORE; - AOP_CASE(comp_swap): return LSC_OP_ATOMIC_CMPXCHG; + case nir_atomic_op_imin: return LSC_OP_ATOMIC_MIN; + case nir_atomic_op_umin: return LSC_OP_ATOMIC_UMIN; + case nir_atomic_op_imax: return LSC_OP_ATOMIC_MAX; + case nir_atomic_op_umax: return LSC_OP_ATOMIC_UMAX; + case nir_atomic_op_iand: return LSC_OP_ATOMIC_AND; + case nir_atomic_op_ior: return LSC_OP_ATOMIC_OR; + case nir_atomic_op_ixor: return LSC_OP_ATOMIC_XOR; + case nir_atomic_op_xchg: return LSC_OP_ATOMIC_STORE; + case nir_atomic_op_cmpxchg: return LSC_OP_ATOMIC_CMPXCHG; -#undef AOP_CASE -#define AOP_CASE(atom) \ - case nir_intrinsic_ssbo_atomic_##atom: \ - case nir_intrinsic_shared_atomic_##atom: \ - case nir_intrinsic_global_atomic_##atom - - AOP_CASE(fmin): return LSC_OP_ATOMIC_FMIN; - AOP_CASE(fmax): return LSC_OP_ATOMIC_FMAX; - AOP_CASE(fcomp_swap): return LSC_OP_ATOMIC_FCMPXCHG; - AOP_CASE(fadd): return LSC_OP_ATOMIC_FADD; - -#undef AOP_CASE + case nir_atomic_op_fmin: return LSC_OP_ATOMIC_FMIN; + case nir_atomic_op_fmax: return LSC_OP_ATOMIC_FMAX; + case nir_atomic_op_fcmpxchg: return LSC_OP_ATOMIC_FCMPXCHG; + case nir_atomic_op_fadd: return LSC_OP_ATOMIC_FADD; default: unreachable("Unsupported NIR atomic intrinsic"); diff --git a/src/intel/compiler/brw_nir_analyze_ubo_ranges.c b/src/intel/compiler/brw_nir_analyze_ubo_ranges.c index aec74c7a3de..bccdf1bc245 100644 --- a/src/intel/compiler/brw_nir_analyze_ubo_ranges.c +++ b/src/intel/compiler/brw_nir_analyze_ubo_ranges.c @@ -128,16 +128,8 @@ analyze_ubos_block(struct ubo_analysis_state *state, nir_block *block) case nir_intrinsic_load_uniform: case nir_intrinsic_image_deref_load: case nir_intrinsic_image_deref_store: - case nir_intrinsic_image_deref_atomic_add: - case nir_intrinsic_image_deref_atomic_imin: - case nir_intrinsic_image_deref_atomic_umin: - case nir_intrinsic_image_deref_atomic_imax: - case nir_intrinsic_image_deref_atomic_umax: - case nir_intrinsic_image_deref_atomic_and: - case nir_intrinsic_image_deref_atomic_or: - case nir_intrinsic_image_deref_atomic_xor: - case nir_intrinsic_image_deref_atomic_exchange: - case nir_intrinsic_image_deref_atomic_comp_swap: + case nir_intrinsic_image_deref_atomic: + case nir_intrinsic_image_deref_atomic_swap: case nir_intrinsic_image_deref_size: state->uses_regular_uniforms = true; continue; diff --git a/src/intel/compiler/brw_nir_lower_storage_image.c b/src/intel/compiler/brw_nir_lower_storage_image.c index 1e97f855134..b58a6ac82c9 100644 --- a/src/intel/compiler/brw_nir_lower_storage_image.c +++ b/src/intel/compiler/brw_nir_lower_storage_image.c @@ -700,16 +700,8 @@ brw_nir_lower_storage_image_instr(nir_builder *b, return lower_image_store_instr(b, opts->devinfo, intrin); return false; - case nir_intrinsic_image_deref_atomic_add: - case nir_intrinsic_image_deref_atomic_imin: - case nir_intrinsic_image_deref_atomic_umin: - case nir_intrinsic_image_deref_atomic_imax: - case nir_intrinsic_image_deref_atomic_umax: - case nir_intrinsic_image_deref_atomic_and: - case nir_intrinsic_image_deref_atomic_or: - case nir_intrinsic_image_deref_atomic_xor: - case nir_intrinsic_image_deref_atomic_exchange: - case nir_intrinsic_image_deref_atomic_comp_swap: + case nir_intrinsic_image_deref_atomic: + case nir_intrinsic_image_deref_atomic_swap: if (opts->lower_atomics) return lower_image_atomic_instr(b, opts->devinfo, intrin); return false; diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp index c94331f3126..14bc7c5a10b 100644 --- a/src/intel/compiler/brw_vec4_nir.cpp +++ b/src/intel/compiler/brw_vec4_nir.cpp @@ -541,16 +541,8 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr) break; } - case nir_intrinsic_ssbo_atomic_add: - case nir_intrinsic_ssbo_atomic_imin: - case nir_intrinsic_ssbo_atomic_umin: - case nir_intrinsic_ssbo_atomic_imax: - case nir_intrinsic_ssbo_atomic_umax: - case nir_intrinsic_ssbo_atomic_and: - case nir_intrinsic_ssbo_atomic_or: - case nir_intrinsic_ssbo_atomic_xor: - case nir_intrinsic_ssbo_atomic_exchange: - case nir_intrinsic_ssbo_atomic_comp_swap: + case nir_intrinsic_ssbo_atomic: + case nir_intrinsic_ssbo_atomic_swap: nir_emit_ssbo_atomic(lsc_op_to_legacy_atomic(lsc_aop_for_nir_intrinsic(instr)), instr); break; diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c index b443baebc7b..d6c75c13458 100644 --- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c +++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c @@ -139,17 +139,8 @@ get_used_bindings(UNUSED nir_builder *_b, nir_instr *instr, void *_state) case nir_intrinsic_image_deref_load: case nir_intrinsic_image_deref_store: - case nir_intrinsic_image_deref_atomic_add: - case nir_intrinsic_image_deref_atomic_imin: - case nir_intrinsic_image_deref_atomic_umin: - case nir_intrinsic_image_deref_atomic_imax: - case nir_intrinsic_image_deref_atomic_umax: - case nir_intrinsic_image_deref_atomic_and: - case nir_intrinsic_image_deref_atomic_or: - case nir_intrinsic_image_deref_atomic_xor: - case nir_intrinsic_image_deref_atomic_exchange: - case nir_intrinsic_image_deref_atomic_comp_swap: - case nir_intrinsic_image_deref_atomic_fadd: + case nir_intrinsic_image_deref_atomic: + case nir_intrinsic_image_deref_atomic_swap: case nir_intrinsic_image_deref_size: case nir_intrinsic_image_deref_samples: case nir_intrinsic_image_deref_load_param_intel: @@ -823,20 +814,8 @@ lower_direct_buffer_instr(nir_builder *b, nir_instr *instr, void *_state) case nir_intrinsic_store_deref: return try_lower_direct_buffer_intrinsic(b, intrin, false, state); - case nir_intrinsic_deref_atomic_add: - case nir_intrinsic_deref_atomic_imin: - case nir_intrinsic_deref_atomic_umin: - case nir_intrinsic_deref_atomic_imax: - case nir_intrinsic_deref_atomic_umax: - case nir_intrinsic_deref_atomic_and: - case nir_intrinsic_deref_atomic_or: - case nir_intrinsic_deref_atomic_xor: - case nir_intrinsic_deref_atomic_exchange: - case nir_intrinsic_deref_atomic_comp_swap: - case nir_intrinsic_deref_atomic_fadd: - case nir_intrinsic_deref_atomic_fmin: - case nir_intrinsic_deref_atomic_fmax: - case nir_intrinsic_deref_atomic_fcomp_swap: + case nir_intrinsic_deref_atomic: + case nir_intrinsic_deref_atomic_swap: return try_lower_direct_buffer_intrinsic(b, intrin, true, state); case nir_intrinsic_load_vulkan_descriptor: @@ -1240,17 +1219,8 @@ apply_pipeline_layout(nir_builder *b, nir_instr *instr, void *_state) return lower_get_ssbo_size(b, intrin, state); case nir_intrinsic_image_deref_load: case nir_intrinsic_image_deref_store: - case nir_intrinsic_image_deref_atomic_add: - case nir_intrinsic_image_deref_atomic_imin: - case nir_intrinsic_image_deref_atomic_umin: - case nir_intrinsic_image_deref_atomic_imax: - case nir_intrinsic_image_deref_atomic_umax: - case nir_intrinsic_image_deref_atomic_and: - case nir_intrinsic_image_deref_atomic_or: - case nir_intrinsic_image_deref_atomic_xor: - case nir_intrinsic_image_deref_atomic_exchange: - case nir_intrinsic_image_deref_atomic_comp_swap: - case nir_intrinsic_image_deref_atomic_fadd: + case nir_intrinsic_image_deref_atomic: + case nir_intrinsic_image_deref_atomic_swap: case nir_intrinsic_image_deref_size: case nir_intrinsic_image_deref_samples: case nir_intrinsic_image_deref_load_param_intel: diff --git a/src/intel/vulkan_hasvk/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan_hasvk/anv_nir_apply_pipeline_layout.c index 67219cfd2ff..791083b8090 100644 --- a/src/intel/vulkan_hasvk/anv_nir_apply_pipeline_layout.c +++ b/src/intel/vulkan_hasvk/anv_nir_apply_pipeline_layout.c @@ -134,17 +134,8 @@ get_used_bindings(UNUSED nir_builder *_b, nir_instr *instr, void *_state) case nir_intrinsic_image_deref_load: case nir_intrinsic_image_deref_store: - case nir_intrinsic_image_deref_atomic_add: - case nir_intrinsic_image_deref_atomic_imin: - case nir_intrinsic_image_deref_atomic_umin: - case nir_intrinsic_image_deref_atomic_imax: - case nir_intrinsic_image_deref_atomic_umax: - case nir_intrinsic_image_deref_atomic_and: - case nir_intrinsic_image_deref_atomic_or: - case nir_intrinsic_image_deref_atomic_xor: - case nir_intrinsic_image_deref_atomic_exchange: - case nir_intrinsic_image_deref_atomic_comp_swap: - case nir_intrinsic_image_deref_atomic_fadd: + case nir_intrinsic_image_deref_atomic: + case nir_intrinsic_image_deref_atomic_swap: case nir_intrinsic_image_deref_size: case nir_intrinsic_image_deref_samples: case nir_intrinsic_image_deref_load_param_intel: @@ -746,20 +737,8 @@ lower_direct_buffer_instr(nir_builder *b, nir_instr *instr, void *_state) switch (intrin->intrinsic) { case nir_intrinsic_load_deref: case nir_intrinsic_store_deref: - case nir_intrinsic_deref_atomic_add: - case nir_intrinsic_deref_atomic_imin: - case nir_intrinsic_deref_atomic_umin: - case nir_intrinsic_deref_atomic_imax: - case nir_intrinsic_deref_atomic_umax: - case nir_intrinsic_deref_atomic_and: - case nir_intrinsic_deref_atomic_or: - case nir_intrinsic_deref_atomic_xor: - case nir_intrinsic_deref_atomic_exchange: - case nir_intrinsic_deref_atomic_comp_swap: - case nir_intrinsic_deref_atomic_fadd: - case nir_intrinsic_deref_atomic_fmin: - case nir_intrinsic_deref_atomic_fmax: - case nir_intrinsic_deref_atomic_fcomp_swap: + case nir_intrinsic_deref_atomic: + case nir_intrinsic_deref_atomic_swap: return try_lower_direct_buffer_intrinsic(b, intrin, state); case nir_intrinsic_load_vulkan_descriptor: @@ -1238,17 +1217,8 @@ apply_pipeline_layout(nir_builder *b, nir_instr *instr, void *_state) return lower_get_ssbo_size(b, intrin, state); case nir_intrinsic_image_deref_load: case nir_intrinsic_image_deref_store: - case nir_intrinsic_image_deref_atomic_add: - case nir_intrinsic_image_deref_atomic_imin: - case nir_intrinsic_image_deref_atomic_umin: - case nir_intrinsic_image_deref_atomic_imax: - case nir_intrinsic_image_deref_atomic_umax: - case nir_intrinsic_image_deref_atomic_and: - case nir_intrinsic_image_deref_atomic_or: - case nir_intrinsic_image_deref_atomic_xor: - case nir_intrinsic_image_deref_atomic_exchange: - case nir_intrinsic_image_deref_atomic_comp_swap: - case nir_intrinsic_image_deref_atomic_fadd: + case nir_intrinsic_image_deref_atomic: + case nir_intrinsic_image_deref_atomic_swap: case nir_intrinsic_image_deref_size: case nir_intrinsic_image_deref_samples: case nir_intrinsic_image_deref_load_param_intel: