diff --git a/src/intel/compiler/brw_eu.h b/src/intel/compiler/brw_eu.h
index d84af2b73b4..6c15ad78a08 100644
--- a/src/intel/compiler/brw_eu.h
+++ b/src/intel/compiler/brw_eu.h
@@ -1068,10 +1068,12 @@ brw_fb_read_desc(const struct intel_device_info *devinfo,
                  bool per_sample)
 {
    assert(devinfo->ver >= 9);
+   assert(exec_size == 8 || exec_size == 16);
+
    return brw_fb_desc(devinfo, binding_table_index,
                       GFX9_DATAPORT_RC_RENDER_TARGET_READ, msg_control) |
           SET_BITS(per_sample, 13, 13) |
-          SET_BITS(exec_size == 16, 8, 8) /* Render Target Message Subtype */;
+          SET_BITS(exec_size == 8, 8, 8) /* Render Target Message Subtype */;
 }
 
 static inline uint32_t
diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index a8577fac632..775ef37e034 100644
--- a/src/intel/compiler/brw_eu_emit.c
+++ b/src/intel/compiler/brw_eu_emit.c
@@ -2490,7 +2490,7 @@ gfx9_fb_READ(struct brw_codegen *p,
       p, insn,
       brw_message_desc(devinfo, msg_length, response_length, true) |
       brw_fb_read_desc(devinfo, binding_table_index, 0 /* msg_control */,
-                       brw_get_default_exec_size(p), per_sample));
+                       1 << brw_get_default_exec_size(p), per_sample));
    brw_inst_set_rt_slot_group(devinfo, insn, brw_get_default_group(p) / 16);
 
    return insn;