diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 1643da3908c..7fd9523ec5c 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -1149,31 +1149,6 @@ fs_visitor::assign_constant_locations()
       push_constant_loc[u] = u;
 }
 
-bool
-fs_visitor::get_pull_locs(const brw_reg &src,
-                          unsigned *out_surf_index,
-                          unsigned *out_pull_index)
-{
-   assert(src.file == UNIFORM);
-
-   if (src.nr < UBO_START)
-      return false;
-
-   const struct brw_ubo_range *range =
-      &prog_data->ubo_ranges[src.nr - UBO_START];
-
-   /* If this access is in our (reduced) range, use the push data. */
-   if (src.offset / 32 < range->length)
-      return false;
-
-   *out_surf_index = range->block;
-   *out_pull_index = (32 * range->start + src.offset) / 4;
-
-   prog_data->has_ubo_pull = true;
-
-   return true;
-}
-
 /**
  * Get the mask of SIMD channels enabled during dispatch and not yet disabled
  * by discard.  Due to the layout of the sample mask in the fragment shader
diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h
index a17d78c4121..937bf8fb012 100644
--- a/src/intel/compiler/brw_fs.h
+++ b/src/intel/compiler/brw_fs.h
@@ -313,8 +313,6 @@ public:
                                  unsigned payload_node_count,
                                  int *payload_last_use_ip) const;
    void assign_constant_locations();
-   bool get_pull_locs(const brw_reg &src, unsigned *out_surf_index,
-                      unsigned *out_pull_index);
    void invalidate_analysis(brw::analysis_dependency_class c);
 
    void vfail(const char *msg, va_list args);
diff --git a/src/intel/compiler/brw_lower.cpp b/src/intel/compiler/brw_lower.cpp
index 279255edac0..67ba76b67b4 100644
--- a/src/intel/compiler/brw_lower.cpp
+++ b/src/intel/compiler/brw_lower.cpp
@@ -49,77 +49,6 @@ brw_lower_scalar_fp64_MAD(fs_visitor &s)
    return progress;
 }
 
-/**
- * Replace UNIFORM register file access with either UNIFORM_PULL_CONSTANT_LOAD
- * or VARYING_PULL_CONSTANT_LOAD instructions which load values into VGRFs.
- */
-bool
-brw_lower_constant_loads(fs_visitor &s)
-{
-   unsigned index, pull_index;
-   bool progress = false;
-
-   foreach_block_and_inst_safe (block, fs_inst, inst, s.cfg) {
-      /* Set up the annotation tracking for new generated instructions. */
-      const fs_builder ibld(&s, block, inst);
-
-      for (int i = 0; i < inst->sources; i++) {
-	 if (inst->src[i].file != UNIFORM)
-	    continue;
-
-         /* We'll handle this case later */
-         if (inst->opcode == SHADER_OPCODE_MOV_INDIRECT && i == 0)
-            continue;
-
-         if (!s.get_pull_locs(inst->src[i], &index, &pull_index))
-	    continue;
-
-         assert(inst->src[i].stride == 0);
-
-         const unsigned block_sz = 64; /* Fetch one cacheline at a time. */
-         const fs_builder ubld = ibld.exec_all().group(block_sz / 4, 0);
-         const brw_reg dst = ubld.vgrf(BRW_TYPE_UD);
-         const unsigned base = pull_index * 4;
-
-         brw_reg srcs[PULL_UNIFORM_CONSTANT_SRCS];
-         srcs[PULL_UNIFORM_CONSTANT_SRC_SURFACE] = brw_imm_ud(index);
-         srcs[PULL_UNIFORM_CONSTANT_SRC_OFFSET]  = brw_imm_ud(base & ~(block_sz - 1));
-         srcs[PULL_UNIFORM_CONSTANT_SRC_SIZE]    = brw_imm_ud(block_sz);
-
-
-         ubld.emit(FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD, dst,
-                   srcs, PULL_UNIFORM_CONSTANT_SRCS);
-
-         /* Rewrite the instruction to use the temporary VGRF. */
-         inst->src[i].file = VGRF;
-         inst->src[i].nr = dst.nr;
-         inst->src[i].offset = (base & (block_sz - 1)) +
-                               inst->src[i].offset % 4;
-
-         progress = true;
-      }
-
-      if (inst->opcode == SHADER_OPCODE_MOV_INDIRECT &&
-          inst->src[0].file == UNIFORM) {
-
-         if (!s.get_pull_locs(inst->src[0], &index, &pull_index))
-            continue;
-
-         ibld.VARYING_PULL_CONSTANT_LOAD(inst->dst,
-                                         brw_imm_ud(index),
-                                         brw_reg() /* surface_handle */,
-                                         inst->src[1],
-                                         pull_index * 4, 4, 1);
-         inst->remove(block);
-
-         progress = true;
-      }
-   }
-   s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
-
-   return progress;
-}
-
 bool
 brw_lower_load_payload(fs_visitor &s)
 {
diff --git a/src/intel/compiler/brw_opt.cpp b/src/intel/compiler/brw_opt.cpp
index 8c2317c8c36..345e393f2e8 100644
--- a/src/intel/compiler/brw_opt.cpp
+++ b/src/intel/compiler/brw_opt.cpp
@@ -44,7 +44,6 @@ brw_optimize(fs_visitor &s)
    })
 
    s.assign_constant_locations();
-   OPT(brw_lower_constant_loads);
 
    if (s.compiler->lower_dpas)
       OPT(brw_lower_dpas);