From 937ffb1af0201fbb11c939ca67f7c5b6a31035fa Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Thu, 21 Jan 2021 02:55:59 -0600 Subject: [PATCH] nir/apply_pipeline_layout: Handle bindless shaders They don't have binding tables so they have to use A64 descriptor set access and everything has to be bindless all the time. Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/vulkan/anv_nir_apply_pipeline_layout.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c index 0745e59e627..efaf00a5df8 100644 --- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c +++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c @@ -1402,7 +1402,9 @@ anv_nir_apply_pipeline_layout(const struct anv_physical_device *pdevice, .pdevice = pdevice, .layout = layout, .add_bounds_checks = robust_buffer_access, - .desc_addr_format = nir_address_format_32bit_index_offset, + .desc_addr_format = brw_shader_stage_is_bindless(shader->info.stage) ? + nir_address_format_64bit_global_32bit_offset : + nir_address_format_32bit_index_offset, .ssbo_addr_format = anv_nir_ssbo_addr_format(pdevice, robust_buffer_access), .ubo_addr_format = anv_nir_ubo_addr_format(pdevice, robust_buffer_access), .lowered_instrs = _mesa_pointer_set_create(mem_ctx), @@ -1504,7 +1506,8 @@ anv_nir_apply_pipeline_layout(const struct anv_physical_device *pdevice, if (binding->data & ANV_DESCRIPTOR_SURFACE_STATE) { if (map->surface_count + array_size > MAX_BINDING_TABLE_SIZE || - anv_descriptor_requires_bindless(pdevice, binding, false)) { + anv_descriptor_requires_bindless(pdevice, binding, false) || + brw_shader_stage_is_bindless(shader->info.stage)) { /* If this descriptor doesn't fit in the binding table or if it * requires bindless for some reason, flag it as bindless. */ @@ -1543,7 +1546,8 @@ anv_nir_apply_pipeline_layout(const struct anv_physical_device *pdevice, if (binding->data & ANV_DESCRIPTOR_SAMPLER_STATE) { if (map->sampler_count + array_size > MAX_SAMPLER_TABLE_SIZE || - anv_descriptor_requires_bindless(pdevice, binding, true)) { + anv_descriptor_requires_bindless(pdevice, binding, true) || + brw_shader_stage_is_bindless(shader->info.stage)) { /* If this descriptor doesn't fit in the binding table or if it * requires bindless for some reason, flag it as bindless. * @@ -1654,6 +1658,11 @@ anv_nir_apply_pipeline_layout(const struct anv_physical_device *pdevice, ralloc_free(mem_ctx); + if (brw_shader_stage_is_bindless(shader->info.stage)) { + assert(map->surface_count == 0); + assert(map->sampler_count == 0); + } + /* Now that we're done computing the surface and sampler portions of the * bind map, hash them. This lets us quickly determine if the actual * mapping has changed and not just a no-op pipeline change.