From 92900d8bf474eecbcdc8749e503b267ee132d733 Mon Sep 17 00:00:00 2001 From: Georg Lehmann Date: Mon, 24 Jul 2023 13:57:16 +0200 Subject: [PATCH] aco: improve get_gfx11_true16_mask description Reviewed-by: Bas Nieuwenhuizen Part-of: --- src/amd/compiler/aco_ir.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/amd/compiler/aco_ir.cpp b/src/amd/compiler/aco_ir.cpp index 31bde562a2c..179d282c78a 100644 --- a/src/amd/compiler/aco_ir.cpp +++ b/src/amd/compiler/aco_ir.cpp @@ -648,6 +648,7 @@ instr_is_16bit(amd_gfx_level gfx_level, aco_opcode op) /* On GFX11, for some instructions, bit 7 of the destination/operand vgpr is opsel and the field * only supports v0-v127. + * The first three bits are used for operands 0-2, and the 4th bit is used for the destination. */ uint8_t get_gfx11_true16_mask(aco_opcode op)