diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h
index 9cb77b7c5cc..4a3e73db863 100644
--- a/src/intel/compiler/brw_fs.h
+++ b/src/intel/compiler/brw_fs.h
@@ -505,7 +505,8 @@ private:
                      struct brw_reg dst, struct brw_reg src);
    void generate_ddy(const fs_inst *inst,
                      struct brw_reg dst, struct brw_reg src);
-   void generate_scratch_header(fs_inst *inst, struct brw_reg dst);
+   void generate_scratch_header(fs_inst *inst,
+                                struct brw_reg dst, struct brw_reg src);
 
    void generate_halt(fs_inst *inst);
 
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index ecec1f5bf63..0e75755ee7f 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -701,10 +701,14 @@ fs_generator::generate_halt(fs_inst *)
  * information required by either set of opcodes.
  */
 void
-fs_generator::generate_scratch_header(fs_inst *inst, struct brw_reg dst)
+fs_generator::generate_scratch_header(fs_inst *inst,
+                                      struct brw_reg dst,
+                                      struct brw_reg src)
 {
    assert(inst->exec_size == 8 && inst->force_writemask_all);
    assert(dst.file == BRW_GENERAL_REGISTER_FILE);
+   assert(src.file == BRW_GENERAL_REGISTER_FILE);
+   assert(src.type == BRW_TYPE_UD);
 
    dst.type = BRW_TYPE_UD;
 
@@ -716,8 +720,7 @@ fs_generator::generate_scratch_header(fs_inst *inst, struct brw_reg dst)
 
    /* Copy the per-thread scratch space size from g0.3[3:0] */
    brw_set_default_exec_size(p, BRW_EXECUTE_1);
-   insn = brw_AND(p, suboffset(dst, 3),
-                     retype(brw_vec1_grf(0, 3), BRW_TYPE_UD),
+   insn = brw_AND(p, suboffset(dst, 3), component(src, 3),
                      brw_imm_ud(INTEL_MASK(3, 0)));
    if (devinfo->ver < 12) {
       brw_inst_set_no_dd_clear(p->devinfo, insn, true);
@@ -725,8 +728,7 @@ fs_generator::generate_scratch_header(fs_inst *inst, struct brw_reg dst)
    }
 
    /* Copy the scratch base address from g0.5[31:10] */
-   insn = brw_AND(p, suboffset(dst, 5),
-                     retype(brw_vec1_grf(0, 5), BRW_TYPE_UD),
+   insn = brw_AND(p, suboffset(dst, 5), component(src, 5),
                      brw_imm_ud(INTEL_MASK(31, 10)));
    if (devinfo->ver < 12)
       brw_inst_set_no_dd_check(p->devinfo, insn, true);
@@ -1159,7 +1161,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
 	 break;
 
       case SHADER_OPCODE_SCRATCH_HEADER:
-         generate_scratch_header(inst, dst);
+         generate_scratch_header(inst, dst, src[0]);
          break;
 
       case SHADER_OPCODE_MOV_INDIRECT:
diff --git a/src/intel/compiler/brw_fs_reg_allocate.cpp b/src/intel/compiler/brw_fs_reg_allocate.cpp
index 743f5b377cf..585907dbcd7 100644
--- a/src/intel/compiler/brw_fs_reg_allocate.cpp
+++ b/src/intel/compiler/brw_fs_reg_allocate.cpp
@@ -622,7 +622,8 @@ fs_reg_alloc::build_legacy_scratch_header(const fs_builder &bld,
    brw_reg header = retype(alloc_spill_reg(1, ip), BRW_TYPE_UD);
    ra_add_node_interference(g, first_vgrf_node + header.nr, first_payload_node);
 
-   fs_inst *inst = ubld8.emit(SHADER_OPCODE_SCRATCH_HEADER, header);
+   fs_inst *inst =
+      ubld8.emit(SHADER_OPCODE_SCRATCH_HEADER, header, brw_ud8_grf(0, 0));
    _mesa_set_add(spill_insts, inst);
 
    /* Write the scratch offset */
diff --git a/src/intel/compiler/brw_lower_logical_sends.cpp b/src/intel/compiler/brw_lower_logical_sends.cpp
index 4f9165eca1a..50477ad9db6 100644
--- a/src/intel/compiler/brw_lower_logical_sends.cpp
+++ b/src/intel/compiler/brw_lower_logical_sends.cpp
@@ -1461,7 +1461,7 @@ lower_surface_logical_send(const fs_builder &bld, fs_inst *inst)
       assert(!is_surface_access);
       fs_builder ubld = bld.exec_all().group(8, 0);
       header = ubld.vgrf(BRW_TYPE_UD);
-      ubld.emit(SHADER_OPCODE_SCRATCH_HEADER, header);
+      ubld.emit(SHADER_OPCODE_SCRATCH_HEADER, header, brw_ud8_grf(0, 0));
    }
    const unsigned header_sz = header.file != BAD_FILE ? 1 : 0;
 
@@ -1947,7 +1947,7 @@ lower_surface_block_logical_send(const fs_builder &bld, fs_inst *inst)
    brw_reg header = ubld.vgrf(BRW_TYPE_UD);
 
    if (is_stateless)
-      ubld.emit(SHADER_OPCODE_SCRATCH_HEADER, header);
+      ubld.emit(SHADER_OPCODE_SCRATCH_HEADER, header, brw_ud8_grf(0, 0));
    else
       ubld.MOV(header, brw_imm_d(0));