From 91f676819cdc74f2782f6e986e59008c56c05af1 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Tue, 1 Aug 2023 14:14:13 -0400 Subject: [PATCH] vc4,broadcom/compiler: Drop write_mask handling There's no legacy register support so we ncessarily write a contiguous vector. In other words, the write_mask is of the form `(1 << x) - 1`. Meanwhile this code asserts the write mask is of the form (1 << x)`. Putting it together the write mask is necessarily always 0x1, writing out a single scalar. Signed-off-by: Alyssa Rosenzweig Reviewed-by: Iago Toral Quiroga Part-of: --- src/broadcom/compiler/nir_to_vir.c | 11 ++--------- src/gallium/drivers/vc4/vc4_program.c | 19 ++++++------------- 2 files changed, 8 insertions(+), 22 deletions(-) diff --git a/src/broadcom/compiler/nir_to_vir.c b/src/broadcom/compiler/nir_to_vir.c index 216e669346c..3ccc0d5acbe 100644 --- a/src/broadcom/compiler/nir_to_vir.c +++ b/src/broadcom/compiler/nir_to_vir.c @@ -881,10 +881,8 @@ static struct qreg ntq_get_alu_src(struct v3d_compile *c, nir_alu_instr *instr, unsigned src) { - assert(util_is_power_of_two_or_zero(instr->dest.write_mask)); - unsigned chan = ffs(instr->dest.write_mask) - 1; struct qreg r = ntq_get_src(c, instr->src[src].src, - instr->src[src].swizzle[chan]); + instr->src[src].swizzle[0]); assert(!instr->src[src].abs); assert(!instr->src[src].negate); @@ -1735,12 +1733,7 @@ ntq_emit_alu(struct v3d_compile *c, nir_alu_instr *instr) abort(); } - /* We have a scalar result, so the instruction should only have a - * single channel written to. - */ - assert(util_is_power_of_two_or_zero(instr->dest.write_mask)); - ntq_store_dest(c, &instr->dest.dest, - ffs(instr->dest.write_mask) - 1, result); + ntq_store_dest(c, &instr->dest.dest, 0, result); } /* Each TLB read/write setup (a render target or depth buffer) takes an 8-bit diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c index a3cfb6bee5c..7485f973c88 100644 --- a/src/gallium/drivers/vc4/vc4_program.c +++ b/src/gallium/drivers/vc4/vc4_program.c @@ -279,10 +279,8 @@ static struct qreg ntq_get_alu_src(struct vc4_compile *c, nir_alu_instr *instr, unsigned src) { - assert(util_is_power_of_two_or_zero(instr->dest.write_mask)); - unsigned chan = ffs(instr->dest.write_mask) - 1; struct qreg r = ntq_get_src(c, instr->src[src].src, - instr->src[src].swizzle[chan]); + instr->src[src].swizzle[0]); assert(!instr->src[src].abs); assert(!instr->src[src].negate); @@ -1097,10 +1095,10 @@ ntq_emit_alu(struct vc4_compile *c, nir_alu_instr *instr) if (instr->op == nir_op_unpack_unorm_4x8) { struct qreg src = ntq_get_src(c, instr->src[0].src, instr->src[0].swizzle[0]); - for (int i = 0; i < 4; i++) { - if (instr->dest.write_mask & (1 << i)) - ntq_store_dest(c, &instr->dest.dest, i, - qir_UNPACK_8_F(c, src, i)); + unsigned count = nir_dest_num_components(instr->dest.dest); + for (int i = 0; i < count; i++) { + ntq_store_dest(c, &instr->dest.dest, i, + qir_UNPACK_8_F(c, src, i)); } return; } @@ -1314,12 +1312,7 @@ ntq_emit_alu(struct vc4_compile *c, nir_alu_instr *instr) abort(); } - /* We have a scalar result, so the instruction should only have a - * single channel written to. - */ - assert(util_is_power_of_two_or_zero(instr->dest.write_mask)); - ntq_store_dest(c, &instr->dest.dest, - ffs(instr->dest.write_mask) - 1, result); + ntq_store_dest(c, &instr->dest.dest, 0, result); } static void