diff --git a/src/panfrost/compiler/bifrost.h b/src/panfrost/compiler/bifrost.h
index 2fa43f368b1..9864f3da9ad 100644
--- a/src/panfrost/compiler/bifrost.h
+++ b/src/panfrost/compiler/bifrost.h
@@ -517,47 +517,53 @@ enum bifrost_texture_fetch {
 };
 
 struct bifrost_texture_operation {
-   /* If immediate_indices is set:
-    *     - immediate sampler index
-    *     - index used as texture index
-    * Otherwise:
-    *      - bifrost_single_index in lower 2 bits
-    *      - 0x3 in upper 2 bits (single-texturing)
-    */
-   unsigned sampler_index_or_mode : 4;
-   unsigned index                 : 7;
-   bool immediate_indices         : 1;
-   enum bifrost_tex_op op         : 3;
+   union {
+      struct {
+         /* If immediate_indices is set:
+          *     - immediate sampler index
+          *     - index used as texture index
+          * Otherwise:
+          *      - bifrost_single_index in lower 2 bits
+          *      - 0x3 in upper 2 bits (single-texturing)
+          */
+         unsigned sampler_index_or_mode : 4;
+         unsigned index                 : 7;
+         bool immediate_indices         : 1;
+         enum bifrost_tex_op op         : 3;
 
-   /* If set for TEX/FETCH, loads texel offsets and multisample index from
-    * a staging register containing offset_x:offset_y:offset_z:ms_index
-    * packed 8:8:8:8. Offsets must be in [-31, +31]. If set for
-    * GRDESC(_DER), disable LOD bias. */
-   bool offset_or_bias_disable : 1;
+         /* If set for TEX/FETCH, loads texel offsets and multisample index from
+          * a staging register containing offset_x:offset_y:offset_z:ms_index
+          * packed 8:8:8:8. Offsets must be in [-31, +31]. If set for
+          * GRDESC(_DER), disable LOD bias. */
+         bool offset_or_bias_disable : 1;
 
-   /* If set for TEX/FETCH, loads fp32 shadow comparison value from a
-    * staging register. Implies fetch_component = gather4_r. If set for
-    * GRDESC(_DER), disables LOD clamping. */
-   bool shadow_or_clamp_disable : 1;
+         /* If set for TEX/FETCH, loads fp32 shadow comparison value from a
+          * staging register. Implies fetch_component = gather4_r. If set for
+          * GRDESC(_DER), disables LOD clamping. */
+         bool shadow_or_clamp_disable : 1;
 
-   /* If set, loads an uint32 array index from a staging register. */
-   bool array : 1;
+         /* If set, loads an uint32 array index from a staging register. */
+         bool array : 1;
 
-   /* Texture dimension, or 0 for a cubemap */
-   unsigned dimension : 2;
+         /* Texture dimension, or 0 for a cubemap */
+         unsigned dimension : 2;
 
-   /* Method to compute LOD value or for a FETCH, the
-    * bifrost_texture_fetch component specification */
-   enum bifrost_lod_mode lod_or_fetch : 3;
+         /* Method to compute LOD value or for a FETCH, the
+          * bifrost_texture_fetch component specification */
+         enum bifrost_lod_mode lod_or_fetch : 3;
 
-   /* Reserved */
-   unsigned zero : 1;
+         /* Reserved */
+         unsigned zero : 1;
 
-   /* Register format for the result */
-   enum bifrost_texture_format_full format : 4;
+         /* Register format for the result */
+         enum bifrost_texture_format_full format : 4;
 
-   /* Write mask for the result */
-   unsigned mask : 4;
+         /* Write mask for the result */
+         unsigned mask : 4;
+      };
+
+      uint32_t packed;
+   };
 } __attribute__((packed));
 
 struct bifrost_dual_texture_operation {
diff --git a/src/panfrost/compiler/bifrost_compile.c b/src/panfrost/compiler/bifrost_compile.c
index 1886a5151e1..124ed0b96be 100644
--- a/src/panfrost/compiler/bifrost_compile.c
+++ b/src/panfrost/compiler/bifrost_compile.c
@@ -3667,10 +3667,8 @@ bi_emit_texc(bi_builder *b, nir_tex_instr *instr)
          desc.shadow_or_clamp_disable = i != 0;
 
          bi_index grdesc = bi_temp(b->shader);
-         uint32_t desc_u = 0;
-         memcpy(&desc_u, &desc, sizeof(desc_u));
-         bi_instr *I = bi_texc_to(b, grdesc, sr, cx, cy, bi_imm_u32(desc_u),
-                                  false, sr_count, 0);
+         bi_instr *I = bi_texc_to(b, grdesc, sr, cx, cy,
+                                  bi_imm_u32(desc.packed), false, sr_count, 0);
          I->register_format = BI_REGISTER_FORMAT_U32;
 
          bi_emit_cached_split_i32(b, grdesc, 4);
@@ -3691,10 +3689,8 @@ bi_emit_texc(bi_builder *b, nir_tex_instr *instr)
 
    bi_index dst = bi_temp(b->shader);
 
-   uint32_t desc_u = 0;
-   memcpy(&desc_u, &desc, sizeof(desc_u));
    bi_instr *I =
-      bi_texc_to(b, dst, sr, cx, cy, bi_imm_u32(desc_u),
+      bi_texc_to(b, dst, sr, cx, cy, bi_imm_u32(desc.packed),
                  !nir_tex_instr_has_implicit_derivative(instr), sr_count, 0);
    I->register_format = bi_reg_fmt_for_nir(instr->dest_type);