diff --git a/src/gallium/drivers/asahi/agx_state.c b/src/gallium/drivers/asahi/agx_state.c
index 47556e9684d..762b6de5201 100644
--- a/src/gallium/drivers/asahi/agx_state.c
+++ b/src/gallium/drivers/asahi/agx_state.c
@@ -2924,7 +2924,7 @@ agx_upload_textures(struct agx_batch *batch, struct agx_compiled_shader *cs,
 
    if (!ctx->stage[stage].shader) {
       batch->texture_count[stage] = 0;
-      batch->textures[stage] = 0;
+      batch->stage_uniforms[stage].texture_base = 0;
       return;
    }
 
@@ -3001,7 +3001,7 @@ agx_upload_textures(struct agx_batch *batch, struct agx_compiled_shader *cs,
    }
 
    batch->texture_count[stage] = nr_tex_descriptors;
-   batch->textures[stage] = T_tex.gpu;
+   batch->stage_uniforms[stage].texture_base = T_tex.gpu;
 }
 
 uint16_t
@@ -3108,8 +3108,10 @@ agx_update_descriptors(struct agx_batch *batch, struct agx_compiled_shader *cs,
       agx_upload_samplers(batch, cs, stage);
 
    if (ctx->stage[stage].dirty) {
+      struct agx_stage_uniforms *unif = &batch->stage_uniforms[stage];
+
       batch->uniforms.tables[AGX_SYSVAL_STAGE(stage)] =
-         agx_upload_stage_uniforms(batch, batch->textures[stage], stage);
+         agx_pool_upload_aligned(&batch->pool, unif, sizeof(*unif), 16);
    }
 }
 
@@ -3129,7 +3131,7 @@ agx_build_pipeline(struct agx_batch *batch, struct agx_compiled_shader *cs,
          cfg.start = 0;
          cfg.count =
             MIN2(batch->texture_count[merged], AGX_NUM_TEXTURE_STATE_REGS);
-         cfg.buffer = batch->textures[merged];
+         cfg.buffer = batch->stage_uniforms[merged].texture_base;
       }
    }
 
diff --git a/src/gallium/drivers/asahi/agx_state.h b/src/gallium/drivers/asahi/agx_state.h
index 886b5a27e8c..32e54292cae 100644
--- a/src/gallium/drivers/asahi/agx_state.h
+++ b/src/gallium/drivers/asahi/agx_state.h
@@ -346,7 +346,6 @@ struct agx_batch {
    uint64_t geometry_state;
 
    /* Uploaded descriptors */
-   uint64_t textures[PIPE_SHADER_TYPES];
    uint32_t texture_count[PIPE_SHADER_TYPES];
 
    uint64_t samplers[PIPE_SHADER_TYPES];
@@ -931,9 +930,6 @@ void agx_set_cbuf_uniforms(struct agx_batch *batch,
 void agx_set_ssbo_uniforms(struct agx_batch *batch,
                            enum pipe_shader_type stage);
 
-uint64_t agx_upload_stage_uniforms(struct agx_batch *batch, uint64_t textures,
-                                   enum pipe_shader_type stage);
-
 bool agx_nir_lower_point_size(nir_shader *nir, bool fixed_point_size);
 
 bool agx_nir_lower_sysvals(nir_shader *shader, bool lower_draw_params);
diff --git a/src/gallium/drivers/asahi/agx_uniforms.c b/src/gallium/drivers/asahi/agx_uniforms.c
index 03a1354e319..86912958d55 100644
--- a/src/gallium/drivers/asahi/agx_uniforms.c
+++ b/src/gallium/drivers/asahi/agx_uniforms.c
@@ -179,15 +179,3 @@ agx_set_ssbo_uniforms(struct agx_batch *batch, enum pipe_shader_type stage)
       }
    }
 }
-
-uint64_t
-agx_upload_stage_uniforms(struct agx_batch *batch, uint64_t textures,
-                          enum pipe_shader_type stage)
-{
-   struct agx_stage_uniforms *unif = &batch->stage_uniforms[stage];
-
-   unif->texture_base = textures;
-
-   return agx_pool_upload_aligned(&batch->pool, unif,
-                                  sizeof(struct agx_stage_uniforms), 16);
-}