From 8fb8bb6840f0d8935881bba77b107136e1f404c1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Fri, 4 Jul 2025 19:26:26 -0400 Subject: [PATCH] ac/surface/gfx12: add addr_from_coord for sparse MSAA textures Reviewed-by: Samuel Pitoiset Part-of: --- src/amd/common/ac_surface.c | 48 +++++++++++++++++++++++++++++++++---- 1 file changed, 44 insertions(+), 4 deletions(-) diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c index eaf05cdb7fc..7a2dbc84e66 100644 --- a/src/amd/common/ac_surface.c +++ b/src/amd/common/ac_surface.c @@ -4228,10 +4228,10 @@ uint64_t ac_surface_get_plane_size(const struct radeon_surf *surf, } } -uint64_t -ac_surface_addr_from_coord(struct ac_addrlib *addrlib, const struct radeon_info *info, - const struct radeon_surf *surf, const struct ac_surf_info *surf_info, - unsigned level, unsigned x, unsigned y, unsigned layer, bool is_3d) +static uint64_t +gfx9_surface_addr_from_coord(struct ac_addrlib *addrlib, const struct radeon_info *info, + const struct radeon_surf *surf, const struct ac_surf_info *surf_info, + unsigned level, unsigned x, unsigned y, unsigned layer, bool is_3d) { /* Only implemented for GFX9+ */ assert(info->gfx_level >= GFX9); @@ -4259,6 +4259,46 @@ ac_surface_addr_from_coord(struct ac_addrlib *addrlib, const struct radeon_info return output.addr; } +static uint64_t +gfx12_surface_addr_from_coord(struct ac_addrlib *addrlib, const struct radeon_info *info, + const struct radeon_surf *surf, const struct ac_surf_info *surf_info, + unsigned level, unsigned x, unsigned y, unsigned layer, bool is_3d) +{ + ADDR3_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT input = {0}; + input.size = sizeof(ADDR3_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT); + input.slice = layer; + input.mipId = level; + input.pitchInElement = surf->u.gfx9.pitch[level]; + input.unAlignedDims.width = DIV_ROUND_UP(surf_info->width, surf->blk_w); + input.unAlignedDims.height = DIV_ROUND_UP(surf_info->height, surf->blk_h); + input.unAlignedDims.depth = is_3d ? surf_info->depth : surf_info->array_size; + input.numMipLevels = surf_info->levels; + input.numSamples = surf_info->samples; + input.swizzleMode = surf->u.gfx9.swizzle_mode; + input.resourceType = (AddrResourceType)surf->u.gfx9.resource_type; + input.bpp = surf->bpe * 8; + input.x = x; + input.y = y; + + ADDR3_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT output = {0}; + output.size = sizeof(ADDR3_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT); + Addr3ComputeSurfaceAddrFromCoord(addrlib->handle, &input, &output); + return output.addr; +} + +uint64_t +ac_surface_addr_from_coord(struct ac_addrlib *addrlib, const struct radeon_info *info, + const struct radeon_surf *surf, const struct ac_surf_info *surf_info, + unsigned level, unsigned x, unsigned y, unsigned layer, bool is_3d) +{ + if (info->gfx_level >= GFX12) + return gfx12_surface_addr_from_coord(addrlib, info, surf, surf_info, level, x, y, layer, is_3d); + else if (info->gfx_level >= GFX9) + return gfx9_surface_addr_from_coord(addrlib, info, surf, surf_info, level, x, y, layer, is_3d); + else + unreachable("invalid gfx_level"); +} + static void gfx12_surface_compute_nbc_view(struct ac_addrlib *addrlib, const struct radeon_info *info, const struct radeon_surf *surf, const struct ac_surf_info *surf_info,