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intel/genxml: fix gen6 LD->VLD typo.

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Pointed out by Ilia

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13788>
This commit is contained in:
Dave Airlie
2021-11-15 09:07:48 +10:00
committed by Marge Bot
parent 2bb8aa2942
commit 8f9006804a
1 changed files with 1 additions and 1 deletions
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src/intel/genxml/gen6.xml
+1 -1
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@@ -2162,7 +2162,7 @@
<field name="Post Deblocking Output Enable" start="41" end="41" type="bool"/>
<field name="Stream-Out Enable" start="42" end="42" type="bool"/>
<field name="Decoder Mode Select" start="48" end="48" type="uint">
<value name="LD Mode" value="0"/>
<value name="VLD Mode" value="0"/>
<value name="IT Mode" value="1"/>
</field>
<field name="AVC ILDB Boundary Strength Calculation" start="64" end="64" type="uint">