diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 2ced4163cb5..94c723bf4c8 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -9771,17 +9771,18 @@ radv_trace_rays(struct radv_cmd_buffer *cmd_buffer, const VkTraceRaysIndirectCom
    struct radv_compute_pipeline *pipeline = &cmd_buffer->state.rt_pipeline->base;
    uint32_t base_reg = pipeline->base.user_data_0[MESA_SHADER_COMPUTE];
 
-   /* Reserve scratch for dynamic stacks manually since it is not handled by the compute path. */
-   if (cmd_buffer->state.rt_pipeline->dynamic_stack_size) {
-      uint32_t scratch_bytes_per_wave = pipeline->base.scratch_bytes_per_wave;
-      uint32_t wave_size = pipeline->base.shaders[MESA_SHADER_COMPUTE]->info.wave_size;
+   /* Reserve scratch for stacks manually since it is not handled by the compute path. */
+   uint32_t scratch_bytes_per_wave = pipeline->base.scratch_bytes_per_wave;
+   uint32_t wave_size = pipeline->base.shaders[MESA_SHADER_COMPUTE]->info.wave_size;
+   uint32_t stack_size = cmd_buffer->state.rt_pipeline->stack_size;
+   if (stack_size == -1u)
+      stack_size = cmd_buffer->state.rt_stack_size; /* dynamic stack size */
 
-      /* The hardware register is specified as a multiple of 256 DWORDS. */
-      scratch_bytes_per_wave += align(cmd_buffer->state.rt_stack_size * wave_size, 1024);
+   /* The hardware register is specified as a multiple of 256 DWORDS. */
+   scratch_bytes_per_wave += align(stack_size * wave_size, 1024);
 
-      cmd_buffer->compute_scratch_size_per_wave_needed =
-         MAX2(cmd_buffer->compute_scratch_size_per_wave_needed, scratch_bytes_per_wave);
-   }
+   cmd_buffer->compute_scratch_size_per_wave_needed =
+      MAX2(cmd_buffer->compute_scratch_size_per_wave_needed, scratch_bytes_per_wave);
 
    struct radv_dispatch_info info = {0};
    info.unaligned = true;
diff --git a/src/amd/vulkan/radv_pipeline_rt.c b/src/amd/vulkan/radv_pipeline_rt.c
index 01ba897e96b..289ae9b52a2 100644
--- a/src/amd/vulkan/radv_pipeline_rt.c
+++ b/src/amd/vulkan/radv_pipeline_rt.c
@@ -236,10 +236,13 @@ radv_rt_pipeline_has_dynamic_stack_size(const VkRayTracingPipelineCreateInfoKHR
    return false;
 }
 
-unsigned
+static unsigned
 compute_rt_stack_size(const VkRayTracingPipelineCreateInfoKHR *pCreateInfo,
                       const struct radv_pipeline_shader_stack_size *stack_sizes)
 {
+   if (radv_rt_pipeline_has_dynamic_stack_size(pCreateInfo))
+      return -1u;
+
    unsigned raygen_size = 0;
    unsigned callable_size = 0;
    unsigned chit_size = 0;
@@ -395,7 +398,6 @@ radv_rt_pipeline_create(VkDevice _device, VkPipelineCache _cache,
       goto shader_fail;
    }
 
-   rt_pipeline->dynamic_stack_size = radv_rt_pipeline_has_dynamic_stack_size(pCreateInfo);
    rt_pipeline->stack_size = compute_rt_stack_size(pCreateInfo, rt_pipeline->stack_sizes);
 
    /* For General and ClosestHit shaders, we can use the shader ID directly as handle.
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 5ada65db5e4..fce99aed9aa 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -1999,9 +1999,6 @@ uint32_t radv_get_hash_flags(const struct radv_device *device, bool stats);
 
 bool radv_rt_pipeline_has_dynamic_stack_size(const VkRayTracingPipelineCreateInfoKHR *pCreateInfo);
 
-unsigned compute_rt_stack_size(const VkRayTracingPipelineCreateInfoKHR *pCreateInfo,
-                               const struct radv_pipeline_shader_stack_size *stack_sizes);
-
 bool radv_enable_rt(const struct radv_physical_device *pdevice, bool rt_pipelines);
 
 bool radv_emulate_rt(const struct radv_physical_device *pdevice);
@@ -2231,7 +2228,6 @@ struct radv_ray_tracing_pipeline {
    struct radv_pipeline_shader_stack_size *stack_sizes;
    uint32_t group_count;
    uint32_t stack_size;
-   bool dynamic_stack_size;
 };
 
 #define RADV_DECL_PIPELINE_DOWNCAST(pipe_type, pipe_enum)            \
diff --git a/src/amd/vulkan/radv_rt_shader.c b/src/amd/vulkan/radv_rt_shader.c
index 15da055009d..61329b5bb04 100644
--- a/src/amd/vulkan/radv_rt_shader.c
+++ b/src/amd/vulkan/radv_rt_shader.c
@@ -1527,10 +1527,7 @@ create_rt_shader(struct radv_device *device, const VkRayTracingPipelineCreateInf
 
    struct rt_variables vars = create_rt_variables(b.shader, pCreateInfo, stack_sizes, key);
    load_sbt_entry(&b, &vars, nir_imm_int(&b, 0), SBT_RAYGEN, SBT_GENERAL_IDX);
-   if (radv_rt_pipeline_has_dynamic_stack_size(pCreateInfo))
-      nir_store_var(&b, vars.stack_ptr, nir_load_rt_dynamic_callable_stack_base_amd(&b), 0x1);
-   else
-      nir_store_var(&b, vars.stack_ptr, nir_imm_int(&b, 0), 0x1);
+   nir_store_var(&b, vars.stack_ptr, nir_load_rt_dynamic_callable_stack_base_amd(&b), 0x1);
 
    nir_store_var(&b, vars.launch_id, nir_load_global_invocation_id(&b, 32), 0x7);
    nir_ssa_def *launch_size_addr = nir_load_ray_launch_size_addr_amd(&b);
@@ -1601,11 +1598,6 @@ create_rt_shader(struct radv_device *device, const VkRayTracingPipelineCreateInf
 
    nir_pop_loop(&b, loop);
 
-   if (radv_rt_pipeline_has_dynamic_stack_size(pCreateInfo))
-      b.shader->scratch_size = 0; /* Stack size is set by the application. */
-   else
-      b.shader->scratch_size += compute_rt_stack_size(pCreateInfo, stack_sizes);
-
    /* Deal with all the inline functions. */
    nir_index_ssa_defs(nir_shader_get_entrypoint(b.shader));
    nir_metadata_preserve(nir_shader_get_entrypoint(b.shader), nir_metadata_none);