From 8e53ba9a0a4f96070c16ef9ee026b7296a62abd5 Mon Sep 17 00:00:00 2001 From: Georg Lehmann Date: Sun, 6 Jul 2025 21:51:05 +0200 Subject: [PATCH] aco: use new disable_wqm for exp MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit No Foz-DB changes on GFX1201. Reviewed-by: Daniel Schürmann Part-of: --- src/amd/compiler/aco_insert_exec_mask.cpp | 6 +++++- src/amd/compiler/aco_ir.h | 3 ++- src/amd/compiler/aco_opcodes.py | 3 ++- .../instruction_selection/aco_select_nir_intrinsics.cpp | 6 +++++- 4 files changed, 14 insertions(+), 4 deletions(-) diff --git a/src/amd/compiler/aco_insert_exec_mask.cpp b/src/amd/compiler/aco_insert_exec_mask.cpp index 001455bc5ff..3f3c083cab7 100644 --- a/src/amd/compiler/aco_insert_exec_mask.cpp +++ b/src/amd/compiler/aco_insert_exec_mask.cpp @@ -62,7 +62,7 @@ struct exec_ctx { bool needs_exact(aco_ptr& instr) { - return instr->isEXP() || instr->opcode == aco_opcode::p_dual_src_export_gfx11; + return instr->opcode == aco_opcode::p_dual_src_export_gfx11; } WQMState @@ -418,6 +418,8 @@ remove_disable_wqm(Instruction* instr) instr->flatlike().disable_wqm = false; } else if (instr->isMIMG()) { instr->mimg().disable_wqm = false; + } else if (instr->isEXP()) { + instr->exp().disable_wqm = false; } /* Remove the two masks so that the assembler doesn't need to handle them. */ @@ -843,6 +845,8 @@ instr_disables_wqm(Instruction* instr) return instr->flatlike().disable_wqm; } else if (instr->isMIMG()) { return instr->mimg().disable_wqm; + } else if (instr->isEXP()) { + return instr->exp().disable_wqm; } return false; diff --git a/src/amd/compiler/aco_ir.h b/src/amd/compiler/aco_ir.h index 4f732428297..12f965271c6 100644 --- a/src/amd/compiler/aco_ir.h +++ b/src/amd/compiler/aco_ir.h @@ -1737,7 +1737,8 @@ struct Export_instruction : public Instruction { bool done : 1; bool valid_mask : 1; bool row_en : 1; - uint8_t padding0 : 4; + bool disable_wqm : 1; + uint8_t padding0 : 3; uint8_t padding1; }; static_assert(sizeof(Export_instruction) == sizeof(Instruction) + 4, "Unexpected padding"); diff --git a/src/amd/compiler/aco_opcodes.py b/src/amd/compiler/aco_opcodes.py index 8163aa21a14..36d6da07e29 100644 --- a/src/amd/compiler/aco_opcodes.py +++ b/src/amd/compiler/aco_opcodes.py @@ -152,7 +152,8 @@ class Format(IntEnum): ('unsigned', 'dest', None), ('bool', 'compr', 'false', 'compressed'), ('bool', 'done', 'false'), - ('bool', 'vm', 'false', 'valid_mask')] + ('bool', 'vm', 'false', 'valid_mask'), + ('bool', 'disable_wqm', 'false')] elif self == Format.PSEUDO_BRANCH: return [('uint32_t', 'target0', '0', 'target[0]'), ('uint32_t', 'target1', '0', 'target[1]')] diff --git a/src/amd/compiler/instruction_selection/aco_select_nir_intrinsics.cpp b/src/amd/compiler/instruction_selection/aco_select_nir_intrinsics.cpp index f208ada6c06..87d2e5c7660 100644 --- a/src/amd/compiler/instruction_selection/aco_select_nir_intrinsics.cpp +++ b/src/amd/compiler/instruction_selection/aco_select_nir_intrinsics.cpp @@ -5040,7 +5040,7 @@ visit_intrinsic(isel_context* ctx, nir_intrinsic_instr* instr) const bool row_en = instr->intrinsic == nir_intrinsic_export_row_amd; - aco_ptr exp{create_instruction(aco_opcode::exp, Format::EXP, 4 + row_en, 0)}; + aco_ptr exp{create_instruction(aco_opcode::exp, Format::EXP, 6 + row_en, 0)}; exp->exp().dest = target; exp->exp().enabled_mask = write_mask; @@ -5085,6 +5085,10 @@ visit_intrinsic(isel_context* ctx, nir_intrinsic_instr* instr) exp->operands[4] = bld.m0(row); } + exp->exp().disable_wqm = true; + instr_exact_mask(exp.get()) = Operand(); + instr_wqm_mask(exp.get()) = Operand(); + ctx->block->instructions.emplace_back(std::move(exp)); break; }