From 8d3468ad5b1618f839ad3383646ff75d54e2b755 Mon Sep 17 00:00:00 2001
From: Jason Ekstrand <jason@jlekstrand.net>
Date: Thu, 24 Jun 2021 17:48:01 -0500
Subject: [PATCH] intel/compiler: Add LSC to messages brw_ir_performance

This adds framework only.  No opcodes.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
---
 src/intel/compiler/brw_ir_performance.cpp | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/intel/compiler/brw_ir_performance.cpp b/src/intel/compiler/brw_ir_performance.cpp
index fdffdfdaf83..c18768071f3 100644
--- a/src/intel/compiler/brw_ir_performance.cpp
+++ b/src/intel/compiler/brw_ir_performance.cpp
@@ -1093,6 +1093,14 @@ namespace {
                abort();
             }
 
+         case GFX12_SFID_UGM:
+         case GFX12_SFID_TGM:
+         case GFX12_SFID_SLM:
+            switch (lsc_msg_desc_opcode(devinfo, info.desc)) {
+            default:
+               abort();
+            }
+
          case GEN_RT_SFID_BINDLESS_THREAD_DISPATCH:
          case GEN_RT_SFID_RAY_TRACE_ACCELERATOR:
             return calculate_desc(info, unit_spawner, 2, 0, 0, 0 /* XXX */, 0,