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aco: convert vs and so info over to aco structs.

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This renames the vs to vp (vertex pipeline) on the way past.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16342>
This commit is contained in:
Dave Airlie
2022-05-05 12:22:13 +10:00
committed by Marge Bot
parent 3dba3458e9
commit 8cfd8420ab
4 changed files with 52 additions and 10 deletions
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src/amd/compiler/aco_instruction_selection.cpp
+3 -3
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@@ -10521,7 +10521,7 @@ export_vs_varying(isel_context* ctx, int slot, bool is_pos, int* next_pos)
static void
export_vs_psiz_layer_viewport_vrs(isel_context* ctx, int* next_pos,
const radv_vs_output_info* outinfo)
const aco_vp_output_info* outinfo)
{
aco_ptr<Export_instruction> exp{
create_instruction<Export_instruction>(aco_opcode::exp, Format::EXP, 4, 0)};
@@ -10568,7 +10568,7 @@ static void
create_vs_exports(isel_context* ctx)
{
assert(ctx->stage.hw == HWStage::VS || ctx->stage.hw == HWStage::NGG);
const radv_vs_output_info* outinfo =
const aco_vp_output_info* outinfo =
ctx->stage.has(SWStage::GS) ? &ctx->program->info.vs.outinfo :
ctx->stage.has(SWStage::TES) ? &ctx->program->info.tes.outinfo :
ctx->stage.has(SWStage::MS) ? &ctx->program->info.ms.outinfo :
@@ -10627,7 +10627,7 @@ static void
create_primitive_exports(isel_context *ctx, Temp prim_ch1)
{
assert(ctx->stage.hw == HWStage::NGG);
const radv_vs_output_info* outinfo =
const aco_vp_output_info* outinfo =
ctx->stage.has(SWStage::GS) ? &ctx->program->info.vs.outinfo :
ctx->stage.has(SWStage::TES) ? &ctx->program->info.tes.outinfo :
ctx->stage.has(SWStage::MS) ? &ctx->program->info.ms.outinfo :