diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index cc680ad3e65..2676215f04f 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -7895,7 +7895,7 @@ radv_bind_task_shader(struct radv_cmd_buffer *cmd_buffer, const struct radv_shad
    if (!radv_gang_init(cmd_buffer))
       return;
 
-   if (radv_get_user_sgpr_info(ts, AC_UD_SHADER_QUERY_STATE)->sgpr_idx != -1) {
+   if (radv_get_user_sgpr_info(ts, AC_UD_TASK_STATE)->sgpr_idx != -1) {
       /* Re-emit shader query state when SGPR exists but location potentially changed. */
       cmd_buffer->state.dirty |= RADV_CMD_DIRTY_SHADER_QUERY;
    }
@@ -10610,10 +10610,10 @@ radv_emit_task_state(struct radv_cmd_buffer *cmd_buffer)
    if (!task_shader || !pdev->emulate_mesh_shader_queries)
       return;
 
-   const uint32_t shader_query_state_offset = radv_get_user_sgpr_loc(task_shader, AC_UD_SHADER_QUERY_STATE);
+   const uint32_t task_state_offset = radv_get_user_sgpr_loc(task_shader, AC_UD_TASK_STATE);
    enum radv_shader_query_state shader_query_state = radv_shader_query_none;
 
-   if (!shader_query_state_offset)
+   if (!task_state_offset)
       return;
 
    /* By default shader queries are disabled but they are enabled if the command buffer has active ACE
@@ -10624,7 +10624,7 @@ radv_emit_task_state(struct radv_cmd_buffer *cmd_buffer)
        (cmd_buffer->state.inherited_pipeline_statistics & VK_QUERY_PIPELINE_STATISTIC_TASK_SHADER_INVOCATIONS_BIT_EXT))
       shader_query_state |= radv_shader_query_pipeline_stat;
 
-   radeon_set_sh_reg(cmd_buffer->gang.cs, shader_query_state_offset, shader_query_state);
+   radeon_set_sh_reg(cmd_buffer->gang.cs, task_state_offset, shader_query_state);
 }
 
 static void
diff --git a/src/amd/vulkan/radv_shader_args.c b/src/amd/vulkan/radv_shader_args.c
index ac3be28307e..75f5a66444f 100644
--- a/src/amd/vulkan/radv_shader_args.c
+++ b/src/amd/vulkan/radv_shader_args.c
@@ -595,7 +595,7 @@ declare_shader_args(const struct radv_device *device, const struct radv_graphics
          add_ud_arg(args, 1, AC_ARG_INT, &args->ac.task_ring_entry, AC_UD_TASK_RING_ENTRY);
 
          if (has_shader_query) {
-            add_ud_arg(args, 1, AC_ARG_INT, &args->shader_query_state, AC_UD_SHADER_QUERY_STATE);
+            add_ud_arg(args, 1, AC_ARG_INT, &args->task_state, AC_UD_TASK_STATE);
          }
       }
 
diff --git a/src/amd/vulkan/radv_shader_args.h b/src/amd/vulkan/radv_shader_args.h
index 63ebc7ef62d..41826581cf8 100644
--- a/src/amd/vulkan/radv_shader_args.h
+++ b/src/amd/vulkan/radv_shader_args.h
@@ -22,7 +22,7 @@ enum radv_ud_index {
    AC_UD_VIEW_INDEX = 4,
    AC_UD_STREAMOUT_BUFFERS = 5,
    AC_UD_STREAMOUT_STATE = 6,
-   AC_UD_SHADER_QUERY_STATE = 7,
+   AC_UD_TASK_STATE = 7,
    AC_UD_NGG_CULLING_SETTINGS = 8,
    AC_UD_NGG_VIEWPORT = 9,
    AC_UD_NGG_LDS_LAYOUT = 10,
@@ -73,15 +73,15 @@ struct radv_shader_args {
    struct ac_shader_args ac;
 
    struct ac_arg descriptor_sets[MAX_SETS];
-   /* User data 2/3. same as ring_offsets but for task shaders. */
-   struct ac_arg task_ring_offsets;
 
    /* Streamout */
    struct ac_arg streamout_buffers;
    struct ac_arg streamout_state; /* GFX12+ */
 
-   /* Emulated query */
-   struct ac_arg shader_query_state;
+   /* Task */
+   struct ac_arg task_state;
+   /* User data 2/3. same as ring_offsets but for task shaders. */
+   struct ac_arg task_ring_offsets;
 
    /* NGG */
    struct ac_arg ngg_state;