diff --git a/src/gallium/drivers/panfrost/pan_cmdstream.c b/src/gallium/drivers/panfrost/pan_cmdstream.c index b1a9a4c6075..6a3b0bf2bab 100644 --- a/src/gallium/drivers/panfrost/pan_cmdstream.c +++ b/src/gallium/drivers/panfrost/pan_cmdstream.c @@ -80,11 +80,11 @@ panfrost_get_index_buffer_bounded(struct panfrost_context *ctx, if (!info->has_user_indices) { /* Only resources can be directly mapped */ - panfrost_batch_add_bo(batch, rsrc->bo, + panfrost_batch_add_bo(batch, rsrc->image.bo, PAN_BO_ACCESS_SHARED | PAN_BO_ACCESS_READ | PAN_BO_ACCESS_VERTEX_TILER); - out = rsrc->bo->ptr.gpu + offset; + out = rsrc->image.bo->ptr.gpu + offset; /* Check the cache */ needs_indices = !panfrost_minmax_cache_get(rsrc->index_cache, @@ -635,12 +635,12 @@ panfrost_emit_compute_shader_meta(struct panfrost_batch *batch, enum pipe_shader PAN_BO_ACCESS_READ | PAN_BO_ACCESS_VERTEX_TILER); - panfrost_batch_add_bo(batch, pan_resource(ss->upload.rsrc)->bo, + panfrost_batch_add_bo(batch, pan_resource(ss->upload.rsrc)->image.bo, PAN_BO_ACCESS_PRIVATE | PAN_BO_ACCESS_READ | PAN_BO_ACCESS_VERTEX_TILER); - return pan_resource(ss->upload.rsrc)->bo->ptr.gpu + ss->upload.offset; + return pan_resource(ss->upload.rsrc)->image.bo->ptr.gpu + ss->upload.offset; } mali_ptr @@ -760,14 +760,14 @@ panfrost_map_constant_buffer_gpu(struct panfrost_batch *batch, struct panfrost_resource *rsrc = pan_resource(cb->buffer); if (rsrc) { - panfrost_batch_add_bo(batch, rsrc->bo, + panfrost_batch_add_bo(batch, rsrc->image.bo, PAN_BO_ACCESS_SHARED | PAN_BO_ACCESS_READ | panfrost_bo_access_for_stage(st)); /* Alignment gauranteed by * PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT */ - return rsrc->bo->ptr.gpu + cb->buffer_offset; + return rsrc->image.bo->ptr.gpu + cb->buffer_offset; } else if (cb->user_buffer) { return panfrost_pool_upload_aligned(&batch->pool, cb->user_buffer + @@ -892,7 +892,7 @@ panfrost_upload_ssbo_sysval(struct panfrost_batch *batch, struct pipe_shader_buffer sb = ctx->ssbo[st][ssbo_id]; /* Compute address */ - struct panfrost_bo *bo = pan_resource(sb.buffer)->bo; + struct panfrost_bo *bo = pan_resource(sb.buffer)->image.bo; panfrost_batch_add_bo(batch, bo, PAN_BO_ACCESS_SHARED | PAN_BO_ACCESS_RW | @@ -1074,11 +1074,11 @@ panfrost_map_constant_buffer_cpu(struct panfrost_context *ctx, struct panfrost_resource *rsrc = pan_resource(cb->buffer); if (rsrc) { - panfrost_bo_mmap(rsrc->bo); - panfrost_flush_batches_accessing_bo(ctx, rsrc->bo, false); - panfrost_bo_wait(rsrc->bo, INT64_MAX, false); + panfrost_bo_mmap(rsrc->image.bo); + panfrost_flush_batches_accessing_bo(ctx, rsrc->image.bo, false); + panfrost_bo_wait(rsrc->image.bo, INT64_MAX, false); - return rsrc->bo->ptr.cpu + cb->buffer_offset; + return rsrc->image.bo->ptr.cpu + cb->buffer_offset; } else if (cb->user_buffer) { return cb->user_buffer + cb->buffer_offset; } else @@ -1235,7 +1235,7 @@ panfrost_get_tex_desc(struct panfrost_batch *batch, /* Add the BO to the job so it's retained until the job is done. */ - panfrost_batch_add_bo(batch, rsrc->bo, + panfrost_batch_add_bo(batch, rsrc->image.bo, PAN_BO_ACCESS_SHARED | PAN_BO_ACCESS_READ | panfrost_bo_access_for_stage(st)); @@ -1251,8 +1251,8 @@ panfrost_update_sampler_view(struct panfrost_sampler_view *view, struct pipe_context *pctx) { struct panfrost_resource *rsrc = pan_resource(view->base.texture); - if (view->texture_bo != rsrc->bo->ptr.gpu || - view->modifier != rsrc->layout.modifier) { + if (view->texture_bo != rsrc->image.bo->ptr.gpu || + view->modifier != rsrc->image.layout.modifier) { panfrost_bo_unreference(view->bo); panfrost_create_sampler_view_bo(view, pctx, &rsrc->base); } @@ -1286,7 +1286,7 @@ panfrost_emit_texture_descriptors(struct panfrost_batch *batch, /* Add the BOs to the job so they are retained until the job is done. */ - panfrost_batch_add_bo(batch, rsrc->bo, + panfrost_batch_add_bo(batch, rsrc->image.bo, PAN_BO_ACCESS_SHARED | PAN_BO_ACCESS_READ | panfrost_bo_access_for_stage(stage)); @@ -1371,17 +1371,17 @@ emit_image_attribs(struct panfrost_batch *batch, enum pipe_shader_type shader, assert(image->resource->nr_samples <= 1 && "MSAA'd images not supported"); bool is_3d = rsrc->base.target == PIPE_TEXTURE_3D; - bool is_linear = rsrc->layout.modifier == DRM_FORMAT_MOD_LINEAR; + bool is_linear = rsrc->image.layout.modifier == DRM_FORMAT_MOD_LINEAR; bool is_buffer = rsrc->base.target == PIPE_BUFFER; unsigned offset = is_buffer ? image->u.buf.offset : - panfrost_texture_offset(&rsrc->layout, + panfrost_texture_offset(&rsrc->image.layout, image->u.tex.level, is_3d ? 0 : image->u.tex.first_layer, is_3d ? image->u.tex.first_layer : 0); /* AFBC should've been converted to tiled on panfrost_set_shader_image */ - assert(!drm_is_afbc(rsrc->layout.modifier)); + assert(!drm_is_afbc(rsrc->image.layout.modifier)); /* Add a dependency of the batch on the shader image buffer */ uint32_t flags = PAN_BO_ACCESS_SHARED | PAN_BO_ACCESS_VERTEX_TILER; @@ -1392,16 +1392,16 @@ emit_image_attribs(struct panfrost_batch *batch, enum pipe_shader_type shader, unsigned level = is_buffer ? 0 : image->u.tex.level; rsrc->state.slices[level].data_valid = true; } - panfrost_batch_add_bo(batch, rsrc->bo, flags); + panfrost_batch_add_bo(batch, rsrc->image.bo, flags); pan_pack(bufs + (k * 2), ATTRIBUTE_BUFFER, cfg) { cfg.type = is_linear ? MALI_ATTRIBUTE_TYPE_3D_LINEAR : MALI_ATTRIBUTE_TYPE_3D_INTERLEAVED; - cfg.pointer = rsrc->bo->ptr.gpu + offset; + cfg.pointer = rsrc->image.bo->ptr.gpu + offset; cfg.stride = util_format_get_blocksize(image->format); - cfg.size = rsrc->bo->size; + cfg.size = rsrc->image.bo->size; } pan_pack(bufs + (k * 2) + 1, ATTRIBUTE_BUFFER_CONTINUATION_3D, cfg) { @@ -1411,11 +1411,11 @@ emit_image_attribs(struct panfrost_batch *batch, enum pipe_shader_type shader, image->u.tex.last_layer - image->u.tex.first_layer + 1; cfg.row_stride = - is_buffer ? 0 : rsrc->layout.slices[image->u.tex.level].row_stride; + is_buffer ? 0 : rsrc->image.layout.slices[image->u.tex.level].row_stride; if (rsrc->base.target != PIPE_TEXTURE_2D && !is_buffer) { cfg.slice_stride = - panfrost_get_layer_stride(&rsrc->layout, + panfrost_get_layer_stride(&rsrc->image.layout, image->u.tex.level); } } @@ -1534,13 +1534,13 @@ panfrost_emit_vertex_data(struct panfrost_batch *batch, continue; /* Add a dependency of the batch on the vertex buffer */ - panfrost_batch_add_bo(batch, rsrc->bo, + panfrost_batch_add_bo(batch, rsrc->image.bo, PAN_BO_ACCESS_SHARED | PAN_BO_ACCESS_READ | PAN_BO_ACCESS_VERTEX_TILER); /* Mask off lower bits, see offset fixup below */ - mali_ptr raw_addr = rsrc->bo->ptr.gpu + buf->buffer_offset; + mali_ptr raw_addr = rsrc->image.bo->ptr.gpu + buf->buffer_offset; mali_ptr addr = raw_addr & ~63; /* Since we advanced the base pointer, we shrink the buffer @@ -1732,7 +1732,7 @@ panfrost_emit_streamout(struct panfrost_batch *batch, unsigned expected_size = stride * count; /* Grab the BO and bind it to the batch */ - struct panfrost_bo *bo = pan_resource(target->buffer)->bo; + struct panfrost_bo *bo = pan_resource(target->buffer)->image.bo; /* Varyings are WRITE from the perspective of the VERTEX but READ from * the perspective of the TILER and FRAGMENT. diff --git a/src/gallium/drivers/panfrost/pan_compute.c b/src/gallium/drivers/panfrost/pan_compute.c index 9569c695fe1..6617c593048 100644 --- a/src/gallium/drivers/panfrost/pan_compute.c +++ b/src/gallium/drivers/panfrost/pan_compute.c @@ -185,11 +185,11 @@ panfrost_set_global_binding(struct pipe_context *pctx, for (unsigned i = first; i < first + count; ++i) { struct panfrost_resource *rsrc = pan_resource(resources[i]); - panfrost_batch_add_bo(batch, rsrc->bo, + panfrost_batch_add_bo(batch, rsrc->image.bo, PAN_BO_ACCESS_SHARED | PAN_BO_ACCESS_RW); /* The handle points to uint32_t, but space is allocated for 64 bits */ - memcpy(handles[i], &rsrc->bo->ptr.gpu, sizeof(mali_ptr)); + memcpy(handles[i], &rsrc->image.bo->ptr.gpu, sizeof(mali_ptr)); } } diff --git a/src/gallium/drivers/panfrost/pan_context.c b/src/gallium/drivers/panfrost/pan_context.c index 519dcb162bf..500bf154752 100644 --- a/src/gallium/drivers/panfrost/pan_context.c +++ b/src/gallium/drivers/panfrost/pan_context.c @@ -653,7 +653,7 @@ panfrost_indirect_draw(struct panfrost_context *ctx, if (info->index_size) { assert(!info->has_user_indices); - index_buf = pan_resource(info->index.resource)->bo; + index_buf = pan_resource(info->index.resource)->image.bo; panfrost_batch_add_bo(batch, index_buf, PAN_BO_ACCESS_SHARED | PAN_BO_ACCESS_READ | @@ -707,13 +707,13 @@ panfrost_indirect_draw(struct panfrost_context *ctx, vs->info.attribute_count - util_bitcount(ctx->image_mask[PIPE_SHADER_VERTEX]); - panfrost_batch_add_bo(batch, draw_buf->bo, + panfrost_batch_add_bo(batch, draw_buf->image.bo, PAN_BO_ACCESS_SHARED | PAN_BO_ACCESS_READ | PAN_BO_ACCESS_VERTEX_TILER); struct pan_indirect_draw_info draw_info = { .last_indirect_draw = batch->indirect_draw_job_id, - .draw_buf = draw_buf->bo->ptr.gpu + indirect->offset, + .draw_buf = draw_buf->image.bo->ptr.gpu + indirect->offset, .index_buf = index_buf ? index_buf->ptr.gpu : 0, .vertex_job = vertex.gpu, .tiler_job = tiler.gpu, @@ -844,7 +844,7 @@ panfrost_set_shader_images( struct panfrost_resource *rsrc = pan_resource(image->resource); /* Images don't work with AFBC, since they require pixel-level granularity */ - if (drm_is_afbc(rsrc->layout.modifier)) { + if (drm_is_afbc(rsrc->image.layout.modifier)) { pan_resource_modifier_convert(ctx, rsrc, DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED); } @@ -1237,7 +1237,7 @@ panfrost_create_sampler_view_bo(struct panfrost_sampler_view *so, struct panfrost_device *device = pan_device(pctx->screen); struct panfrost_resource *prsrc = (struct panfrost_resource *)texture; enum pipe_format format = so->base.format; - assert(prsrc->bo); + assert(prsrc->image.bo); /* Format to access the stencil portion of a Z32_S8 texture */ if (format == PIPE_FORMAT_X32_S8X24_UINT) { @@ -1259,8 +1259,8 @@ panfrost_create_sampler_view_bo(struct panfrost_sampler_view *so, desc = util_format_description(format); } - so->texture_bo = prsrc->bo->ptr.gpu; - so->modifier = prsrc->layout.modifier; + so->texture_bo = prsrc->image.bo->ptr.gpu; + so->modifier = prsrc->image.layout.modifier; unsigned char user_swizzle[4] = { so->base.swizzle_r, @@ -1304,7 +1304,7 @@ panfrost_create_sampler_view_bo(struct panfrost_sampler_view *so, first_layer, last_layer, texture->nr_samples, type, - prsrc->layout.modifier); + prsrc->image.layout.modifier); so->bo = panfrost_bo_create(device, size, 0); @@ -1322,7 +1322,7 @@ panfrost_create_sampler_view_bo(struct panfrost_sampler_view *so, payload.gpu += MALI_MIDGARD_TEXTURE_LENGTH; } - panfrost_new_texture(device, &prsrc->layout, tex, + panfrost_new_texture(device, &prsrc->image.layout, tex, width, texture->height0, depth, array_size, format, type, @@ -1330,7 +1330,7 @@ panfrost_create_sampler_view_bo(struct panfrost_sampler_view *so, first_layer, last_layer, texture->nr_samples, user_swizzle, - prsrc->bo->ptr.gpu + offset, + prsrc->image.bo->ptr.gpu + offset, &payload); } diff --git a/src/gallium/drivers/panfrost/pan_job.c b/src/gallium/drivers/panfrost/pan_job.c index 73cf3f2f1b6..35ea97ace2d 100644 --- a/src/gallium/drivers/panfrost/pan_job.c +++ b/src/gallium/drivers/panfrost/pan_job.c @@ -559,13 +559,13 @@ panfrost_batch_add_resource_bos(struct panfrost_batch *batch, struct panfrost_resource *rsrc, uint32_t flags) { - panfrost_batch_add_bo(batch, rsrc->bo, flags); + panfrost_batch_add_bo(batch, rsrc->image.bo, flags); if (rsrc->checksum_bo) panfrost_batch_add_bo(batch, rsrc->checksum_bo, flags); if (rsrc->separate_stencil) - panfrost_batch_add_bo(batch, rsrc->separate_stencil->bo, flags); + panfrost_batch_add_bo(batch, rsrc->separate_stencil->image.bo, flags); } /* Adds the BO backing surface to a batch if the surface is non-null */ @@ -819,15 +819,14 @@ panfrost_load_surface(struct panfrost_batch *batch, struct pipe_surface *surf, u enum mali_texture_dimension dim = panfrost_translate_texture_dimension(rsrc->base.target); - struct pan_image img = { + struct pan_image_view iview = { .format = format, .dim = dim, .first_level = level, .last_level = level, .first_layer = surf->u.tex.first_layer, .last_layer = surf->u.tex.last_layer, - .bo = rsrc->bo, - .layout = &rsrc->layout, + .image = &rsrc->image, }; mali_ptr blend_shader = 0; @@ -905,13 +904,13 @@ panfrost_load_surface(struct panfrost_batch *batch, struct pipe_surface *surf, u batch->framebuffer.gpu, tiler, transfer.gpu, vertex_count, - &img, loc); + &iview, loc); } else { panfrost_load_midg(&batch->pool, &batch->scoreboard, blend_shader, batch->framebuffer.gpu, transfer.gpu, vertex_count, - &img, loc); + &iview, loc); } panfrost_batch_add_bo(batch, batch->pool.dev->blit_shaders.bo, diff --git a/src/gallium/drivers/panfrost/pan_mfbd.c b/src/gallium/drivers/panfrost/pan_mfbd.c index 0c595528b18..48fb5976406 100644 --- a/src/gallium/drivers/panfrost/pan_mfbd.c +++ b/src/gallium/drivers/panfrost/pan_mfbd.c @@ -78,7 +78,7 @@ panfrost_mfbd_rt_init_format(const struct panfrost_device *dev, { struct panfrost_resource *rsrc = pan_resource(surf->texture); enum pipe_format format = - drm_is_afbc(rsrc->layout.modifier) ? + drm_is_afbc(rsrc->image.layout.modifier) ? panfrost_afbc_format_fixup(dev, surf->format) : surf->format; @@ -129,12 +129,12 @@ panfrost_mfbd_rt_set_buf(struct pipe_surface *surf, unsigned level = surf->u.tex.level; unsigned first_layer = surf->u.tex.first_layer; assert(surf->u.tex.last_layer == first_layer); - int row_stride = rsrc->layout.slices[level].row_stride; + int row_stride = rsrc->image.layout.slices[level].row_stride; /* Only set layer_stride for layered MSAA rendering */ unsigned nr_samples = surf->texture->nr_samples; - unsigned layer_stride = (nr_samples > 1) ? rsrc->layout.slices[level].surface_stride : 0; + unsigned layer_stride = (nr_samples > 1) ? rsrc->image.layout.slices[level].surface_stride : 0; if (layer_stride) rt->writeback_msaa = MALI_MSAA_LAYERED; @@ -145,7 +145,7 @@ panfrost_mfbd_rt_set_buf(struct pipe_surface *surf, panfrost_mfbd_rt_init_format(dev, surf, rt); - if (rsrc->layout.modifier == DRM_FORMAT_MOD_LINEAR) { + if (rsrc->image.layout.modifier == DRM_FORMAT_MOD_LINEAR) { mali_ptr base = panfrost_get_texture_address(rsrc, level, first_layer, 0); if (dev->arch >= 7) @@ -156,7 +156,7 @@ panfrost_mfbd_rt_set_buf(struct pipe_surface *surf, rt->rgb.base = base; rt->rgb.row_stride = row_stride; rt->rgb.surface_stride = layer_stride; - } else if (rsrc->layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED) { + } else if (rsrc->image.layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED) { mali_ptr base = panfrost_get_texture_address(rsrc, level, first_layer, 0); if (dev->arch >= 7) @@ -167,8 +167,8 @@ panfrost_mfbd_rt_set_buf(struct pipe_surface *surf, rt->rgb.base = base; rt->rgb.row_stride = row_stride; rt->rgb.surface_stride = layer_stride; - } else if (drm_is_afbc(rsrc->layout.modifier)) { - const struct pan_image_slice_layout *slice = &rsrc->layout.slices[level]; + } else if (drm_is_afbc(rsrc->image.layout.modifier)) { + const struct pan_image_slice_layout *slice = &rsrc->image.layout.slices[level]; if (dev->arch >= 7) rt->bifrost_v7.writeback_block_format = MALI_BLOCK_FORMAT_V7_AFBC; @@ -179,7 +179,7 @@ panfrost_mfbd_rt_set_buf(struct pipe_surface *surf, rt->afbc.row_stride = slice->afbc.row_stride / AFBC_HEADER_BYTES_PER_TILE; rt->bifrost_afbc.afbc_wide_block_enable = - panfrost_block_dim(rsrc->layout.modifier, true, 0) > 16; + panfrost_block_dim(rsrc->image.layout.modifier, true, 0) > 16; } else { rt->afbc.chunk_size = 9; rt->midgard_afbc.sparse = true; @@ -191,7 +191,7 @@ panfrost_mfbd_rt_set_buf(struct pipe_surface *surf, &rt->afbc.header, &rt->afbc.body); - if (rsrc->layout.modifier & AFBC_FORMAT_MOD_YTR) + if (rsrc->image.layout.modifier & AFBC_FORMAT_MOD_YTR) rt->afbc.yuv_transform_enable = true; } else { unreachable("Invalid mod"); @@ -257,7 +257,7 @@ panfrost_mfbd_zs_crc_ext_set_bufs(struct panfrost_batch *batch, if (rsrc->checksummed) { unsigned level = c_surf->u.tex.level; - struct pan_image_slice_layout *slice = &rsrc->layout.slices[level]; + struct pan_image_slice_layout *slice = &rsrc->image.layout.slices[level]; *checksum_slice = &rsrc->state.slices[level]; @@ -265,7 +265,7 @@ panfrost_mfbd_zs_crc_ext_set_bufs(struct panfrost_batch *batch, if (rsrc->checksum_bo) ext->crc_base = rsrc->checksum_bo->ptr.gpu; else - ext->crc_base = rsrc->bo->ptr.gpu + slice->crc.offset; + ext->crc_base = rsrc->image.bo->ptr.gpu + slice->crc.offset; if ((batch->clear & PIPE_CLEAR_COLOR0) && dev->arch >= 7) { ext->crc_clear_color = batch->clear_color[0][0] | @@ -294,8 +294,8 @@ panfrost_mfbd_zs_crc_ext_set_bufs(struct panfrost_batch *batch, else ext->zs_msaa_v7 = nr_samples > 1 ? MALI_MSAA_LAYERED : MALI_MSAA_SINGLE; - if (drm_is_afbc(rsrc->layout.modifier)) { - struct pan_image_slice_layout *slice = &rsrc->layout.slices[level]; + if (drm_is_afbc(rsrc->image.layout.modifier)) { + struct pan_image_slice_layout *slice = &rsrc->image.layout.slices[level]; panfrost_get_afbc_pointers(rsrc, level, first_layer, &ext->zs_afbc_header, @@ -316,20 +316,20 @@ panfrost_mfbd_zs_crc_ext_set_bufs(struct panfrost_batch *batch, ext->zs_afbc_sparse = true; } } else { - assert(rsrc->layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED || - rsrc->layout.modifier == DRM_FORMAT_MOD_LINEAR); + assert(rsrc->image.layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED || + rsrc->image.layout.modifier == DRM_FORMAT_MOD_LINEAR); mali_ptr base = panfrost_get_texture_address(rsrc, level, first_layer, 0); /* TODO: Z32F(S8) support, which is always linear */ ext->zs_writeback_base = base; ext->zs_writeback_row_stride = - rsrc->layout.slices[level].row_stride; + rsrc->image.layout.slices[level].row_stride; ext->zs_writeback_surface_stride = (nr_samples > 1) ? - rsrc->layout.slices[level].surface_stride : 0; + rsrc->image.layout.slices[level].surface_stride : 0; - if (rsrc->layout.modifier == DRM_FORMAT_MOD_LINEAR) { + if (rsrc->image.layout.modifier == DRM_FORMAT_MOD_LINEAR) { if (dev->arch >= 7) ext->zs_block_format_v7 = MALI_BLOCK_FORMAT_V7_LINEAR; else @@ -372,7 +372,7 @@ panfrost_mfbd_zs_crc_ext_set_bufs(struct panfrost_batch *batch, struct panfrost_resource *stencil = rsrc->separate_stencil; struct pan_image_slice_layout *stencil_slice = - &stencil->layout.slices[level]; + &stencil->image.layout.slices[level]; ext->s_writeback_base = panfrost_get_texture_address(stencil, level, first_layer, 0); diff --git a/src/gallium/drivers/panfrost/pan_resource.c b/src/gallium/drivers/panfrost/pan_resource.c index e4c7541ab80..accef1e9606 100644 --- a/src/gallium/drivers/panfrost/pan_resource.c +++ b/src/gallium/drivers/panfrost/pan_resource.c @@ -78,38 +78,38 @@ panfrost_resource_from_handle(struct pipe_screen *pscreen, pipe_reference_init(&prsc->reference, 1); prsc->screen = pscreen; - rsc->bo = panfrost_bo_import(dev, whandle->handle); - rsc->layout.format = templat->format; - rsc->layout.modifier = (whandle->modifier == DRM_FORMAT_MOD_INVALID) ? + rsc->image.bo = panfrost_bo_import(dev, whandle->handle); + rsc->image.layout.format = templat->format; + rsc->image.layout.modifier = (whandle->modifier == DRM_FORMAT_MOD_INVALID) ? DRM_FORMAT_MOD_LINEAR : whandle->modifier; - rsc->layout.dim = panfrost_translate_texture_dimension(templat->target); + rsc->image.layout.dim = panfrost_translate_texture_dimension(templat->target); rsc->modifier_constant = true; - rsc->layout.slices[0].line_stride = whandle->stride; - rsc->layout.slices[0].row_stride = whandle->stride; - rsc->layout.width = prsc->width0; - rsc->layout.height = prsc->height0; - rsc->layout.depth = prsc->depth0; - rsc->layout.nr_samples = prsc->nr_samples; - rsc->layout.array_size = prsc->array_size; - rsc->layout.data_size = rsc->bo->size; + rsc->image.layout.slices[0].line_stride = whandle->stride; + rsc->image.layout.slices[0].row_stride = whandle->stride; + rsc->image.layout.width = prsc->width0; + rsc->image.layout.height = prsc->height0; + rsc->image.layout.depth = prsc->depth0; + rsc->image.layout.nr_samples = prsc->nr_samples; + rsc->image.layout.array_size = prsc->array_size; + rsc->image.layout.data_size = rsc->image.bo->size; - if (rsc->layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED || - drm_is_afbc(rsc->layout.modifier)) { - unsigned tile_h = panfrost_block_dim(rsc->layout.modifier, false, 0); + if (rsc->image.layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED || + drm_is_afbc(rsc->image.layout.modifier)) { + unsigned tile_h = panfrost_block_dim(rsc->image.layout.modifier, false, 0); - if (util_format_is_compressed(rsc->layout.format)) + if (util_format_is_compressed(rsc->image.layout.format)) tile_h >>= 2; - rsc->layout.slices[0].row_stride *= tile_h; + rsc->image.layout.slices[0].row_stride *= tile_h; } - rsc->layout.slices[0].offset = whandle->offset; + rsc->image.layout.slices[0].offset = whandle->offset; rsc->state.slices[0].data_valid = true; panfrost_resource_set_damage_region(NULL, &rsc->base, 0, NULL); if (panfrost_should_checksum(dev, rsc)) { unsigned size = - panfrost_compute_checksum_size(&rsc->layout.slices[0], + panfrost_compute_checksum_size(&rsc->image.layout.slices[0], templat->width0, templat->height0); rsc->checksum_bo = panfrost_bo_create(dev, size, 0); @@ -124,7 +124,7 @@ panfrost_resource_from_handle(struct pipe_screen *pscreen, * of hardware (VPU?) that supports the BGR variants. */ assert(!drm_is_afbc(whandle->modifier) || - !panfrost_afbc_format_needs_fixup(dev, rsc->layout.format)); + !panfrost_afbc_format_needs_fixup(dev, rsc->image.layout.format)); if (drm_is_afbc(whandle->modifier)) { @@ -133,15 +133,13 @@ panfrost_resource_from_handle(struct pipe_screen *pscreen, unsigned tile_h = panfrost_block_dim(whandle->modifier, false, 0); - rsc->layout.slices[0].afbc.header_size = + rsc->image.layout.slices[0].afbc.header_size = panfrost_afbc_header_size(templat->width0, templat->height0); - - rsc->layout.slices[0].afbc.row_stride = + rsc->image.layout.slices[0].afbc.row_stride = DIV_ROUND_UP(templat->width0, tile_w) * AFBC_HEADER_BYTES_PER_TILE; - - rsc->layout.slices[0].afbc.body_size = - rsc->layout.slices[0].row_stride * + rsc->image.layout.slices[0].afbc.body_size = + rsc->image.layout.slices[0].row_stride * DIV_ROUND_UP(templat->height0, tile_h); } @@ -172,10 +170,10 @@ panfrost_resource_get_handle(struct pipe_screen *pscreen, * might have issues if the importer is a different piece of hardware * that supports BGR variants. */ - assert(!drm_is_afbc(rsrc->layout.modifier) || - !panfrost_afbc_format_needs_fixup(dev, rsrc->layout.format)); + assert(!drm_is_afbc(rsrc->image.layout.modifier) || + !panfrost_afbc_format_needs_fixup(dev, rsrc->image.layout.format)); - handle->modifier = rsrc->layout.modifier; + handle->modifier = rsrc->image.layout.modifier; rsrc->modifier_constant = true; if (handle->type == WINSYS_HANDLE_TYPE_SHARED) { @@ -184,9 +182,9 @@ panfrost_resource_get_handle(struct pipe_screen *pscreen, if (renderonly_get_handle(scanout, handle)) return true; - handle->handle = rsrc->bo->gem_handle; - handle->stride = rsrc->layout.slices[0].line_stride; - handle->offset = rsrc->layout.slices[0].offset; + handle->handle = rsrc->image.bo->gem_handle; + handle->stride = rsrc->image.layout.slices[0].line_stride; + handle->offset = rsrc->image.layout.slices[0].offset; return TRUE; } else if (handle->type == WINSYS_HANDLE_TYPE_FD) { if (scanout) { @@ -204,14 +202,14 @@ panfrost_resource_get_handle(struct pipe_screen *pscreen, return true; } else { - int fd = panfrost_bo_export(rsrc->bo); + int fd = panfrost_bo_export(rsrc->image.bo); if (fd < 0) return false; handle->handle = fd; - handle->stride = rsrc->layout.slices[0].line_stride; - handle->offset = rsrc->layout.slices[0].offset; + handle->stride = rsrc->image.layout.slices[0].line_stride; + handle->offset = rsrc->image.layout.slices[0].offset; return true; } } @@ -345,25 +343,25 @@ panfrost_setup_layout(struct panfrost_device *dev, unsigned width = res->width0; unsigned height = res->height0; unsigned depth = res->depth0; - unsigned bytes_per_pixel = util_format_get_blocksize(pres->layout.format); + unsigned bytes_per_pixel = util_format_get_blocksize(pres->image.layout.format); - pres->layout.width = width; - pres->layout.height = height; - pres->layout.depth = height; - pres->layout.array_size = res->array_size; + pres->image.layout.width = width; + pres->image.layout.height = height; + pres->image.layout.depth = height; + pres->image.layout.array_size = res->array_size; /* Z32_S8X24 variants are actually stored in 2 planes (one per * component), we have to adjust the bytes_per_pixel value accordingly. */ - if (pres->layout.format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT || - pres->layout.format == PIPE_FORMAT_X32_S8X24_UINT) + if (pres->image.layout.format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT || + pres->image.layout.format == PIPE_FORMAT_X32_S8X24_UINT) bytes_per_pixel = 4; /* MSAA is implemented as a 3D texture with z corresponding to the * sample #, horrifyingly enough */ unsigned nr_samples = MAX2(res->nr_samples, 1); - pres->layout.nr_samples = nr_samples; + pres->image.layout.nr_samples = nr_samples; assert(depth == 1 || nr_samples == 1); @@ -375,9 +373,9 @@ panfrost_setup_layout(struct panfrost_device *dev, bool renderable = res->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL) && res->target != PIPE_BUFFER; - bool afbc = drm_is_afbc(pres->layout.modifier); - bool tiled = pres->layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED; - bool linear = pres->layout.modifier == DRM_FORMAT_MOD_LINEAR; + bool afbc = drm_is_afbc(pres->image.layout.modifier); + bool tiled = pres->image.layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED; + bool linear = pres->image.layout.modifier == DRM_FORMAT_MOD_LINEAR; bool should_align = renderable || tiled || afbc; bool is_3d = res->target == PIPE_TEXTURE_3D; @@ -385,14 +383,14 @@ panfrost_setup_layout(struct panfrost_device *dev, unsigned tile_h = 1, tile_w = 1, tile_shift = 0; if (tiled || afbc) { - tile_w = panfrost_block_dim(pres->layout.modifier, true, 0); - tile_h = panfrost_block_dim(pres->layout.modifier, false, 0); - if (util_format_is_compressed(pres->layout.format)) + tile_w = panfrost_block_dim(pres->image.layout.modifier, true, 0); + tile_h = panfrost_block_dim(pres->image.layout.modifier, false, 0); + if (util_format_is_compressed(pres->image.layout.format)) tile_shift = 2; } for (unsigned l = 0; l <= res->last_level; ++l) { - struct pan_image_slice_layout *slice = &pres->layout.slices[l]; + struct pan_image_slice_layout *slice = &pres->image.layout.slices[l]; unsigned effective_width = width; unsigned effective_height = height; @@ -483,11 +481,11 @@ panfrost_setup_layout(struct panfrost_device *dev, assert(res->array_size); /* Arrays and cubemaps have the entire miptree duplicated */ - pres->layout.array_stride = ALIGN_POT(offset, 64); - pres->layout.data_size = - ALIGN_POT(pres->layout.array_stride * res->array_size, 4096); + pres->image.layout.array_stride = ALIGN_POT(offset, 64); + pres->image.layout.data_size = + ALIGN_POT(pres->image.layout.array_stride * res->array_size, 4096); if (bo_size) - *bo_size = pres->layout.data_size; + *bo_size = pres->image.layout.data_size; } static inline bool @@ -530,7 +528,7 @@ panfrost_should_afbc(struct panfrost_device *dev, const struct panfrost_resource return false; /* Only a small selection of formats are AFBC'able */ - if (!panfrost_format_supports_afbc(dev, pres->layout.format)) + if (!panfrost_format_supports_afbc(dev, pres->image.layout.format)) return false; /* AFBC does not support layered (GLES3 style) multisampling. Use @@ -564,7 +562,7 @@ panfrost_should_afbc(struct panfrost_device *dev, const struct panfrost_resource * share the buffer we can fake those formats since we're in control * of the format/swizzle we apply to the textures/RTs. */ - if (panfrost_afbc_format_needs_fixup(dev, pres->layout.format) && + if (panfrost_afbc_format_needs_fixup(dev, pres->image.layout.format) && (pres->base.bind & (PIPE_BIND_SCANOUT | PIPE_BIND_SHARED))) return false; @@ -585,7 +583,7 @@ panfrost_should_tile(struct panfrost_device *dev, const struct panfrost_resource PIPE_BIND_SCANOUT | PIPE_BIND_SHARED; - unsigned bpp = util_format_get_blocksizebits(pres->layout.format); + unsigned bpp = util_format_get_blocksizebits(pres->image.layout.format); bool is_sane_bpp = bpp == 8 || bpp == 16 || bpp == 24 || bpp == 32 || @@ -639,13 +637,13 @@ static void panfrost_resource_setup(struct panfrost_device *dev, struct panfrost_resource *pres, size_t *bo_size, uint64_t modifier) { - pres->layout.modifier = (modifier != DRM_FORMAT_MOD_INVALID) ? modifier : + pres->image.layout.modifier = (modifier != DRM_FORMAT_MOD_INVALID) ? modifier : panfrost_best_modifier(dev, pres); pres->checksummed = panfrost_should_checksum(dev, pres); /* We can only switch tiled->linear if the resource isn't already * linear and if we control the modifier */ - pres->modifier_constant = !((pres->layout.modifier != DRM_FORMAT_MOD_LINEAR) + pres->modifier_constant = !((pres->image.layout.modifier != DRM_FORMAT_MOD_LINEAR) && (modifier == DRM_FORMAT_MOD_INVALID)); panfrost_setup_layout(dev, pres, bo_size); @@ -654,17 +652,17 @@ panfrost_resource_setup(struct panfrost_device *dev, struct panfrost_resource *p static void panfrost_resource_init_afbc_headers(struct panfrost_resource *pres) { - panfrost_bo_mmap(pres->bo); + panfrost_bo_mmap(pres->image.bo); unsigned nr_samples = MAX2(pres->base.nr_samples, 1); for (unsigned i = 0; i < pres->base.array_size; ++i) { for (unsigned l = 0; l <= pres->base.last_level; ++l) { - struct pan_image_slice_layout *slice = &pres->layout.slices[l]; + struct pan_image_slice_layout *slice = &pres->image.layout.slices[l]; for (unsigned s = 0; s < nr_samples; ++s) { - void *ptr = pres->bo->ptr.cpu + - (i * pres->layout.array_stride) + + void *ptr = pres->image.bo->ptr.cpu + + (i * pres->image.layout.array_stride) + slice->offset + (s * slice->afbc.surface_stride); @@ -739,8 +737,8 @@ panfrost_resource_create_with_modifier(struct pipe_screen *screen, struct panfrost_resource *so = rzalloc(screen, struct panfrost_resource); so->base = *template; so->base.screen = screen; - so->layout.format = template->format; - so->layout.dim = panfrost_translate_texture_dimension(template->target); + so->image.layout.format = template->format; + so->image.layout.dim = panfrost_translate_texture_dimension(template->target); pipe_reference_init(&so->base.reference, 1); @@ -751,9 +749,9 @@ panfrost_resource_create_with_modifier(struct pipe_screen *screen, /* We create a BO immediately but don't bother mapping, since we don't * care to map e.g. FBOs which the CPU probably won't touch */ - so->bo = panfrost_bo_create(dev, bo_size, PAN_BO_DELAY_MMAP); + so->image.bo = panfrost_bo_create(dev, bo_size, PAN_BO_DELAY_MMAP); - if (drm_is_afbc(so->layout.modifier)) + if (drm_is_afbc(so->image.layout.modifier)) panfrost_resource_init_afbc_headers(so); panfrost_resource_set_damage_region(NULL, &so->base, 0, NULL); @@ -804,8 +802,8 @@ panfrost_resource_destroy(struct pipe_screen *screen, if (rsrc->scanout) renderonly_scanout_destroy(rsrc->scanout, dev->ro); - if (rsrc->bo) - panfrost_bo_unreference(rsrc->bo); + if (rsrc->image.bo) + panfrost_bo_unreference(rsrc->image.bo); if (rsrc->checksum_bo) panfrost_bo_unreference(rsrc->checksum_bo); @@ -915,11 +913,11 @@ panfrost_ptr_map(struct pipe_context *pctx, struct panfrost_context *ctx = pan_context(pctx); struct panfrost_device *dev = pan_device(pctx->screen); struct panfrost_resource *rsrc = pan_resource(resource); - int bytes_per_pixel = util_format_get_blocksize(rsrc->layout.format); - struct panfrost_bo *bo = rsrc->bo; + int bytes_per_pixel = util_format_get_blocksize(rsrc->image.layout.format); + struct panfrost_bo *bo = rsrc->image.bo; /* Can't map tiled/compressed directly */ - if ((usage & PIPE_MAP_DIRECTLY) && rsrc->layout.modifier != DRM_FORMAT_MOD_LINEAR) + if ((usage & PIPE_MAP_DIRECTLY) && rsrc->image.layout.modifier != DRM_FORMAT_MOD_LINEAR) return NULL; struct panfrost_transfer *transfer = rzalloc(pctx, struct panfrost_transfer); @@ -931,15 +929,15 @@ panfrost_ptr_map(struct pipe_context *pctx, *out_transfer = &transfer->base; /* We don't have s/w routines for AFBC, so use a staging texture */ - if (drm_is_afbc(rsrc->layout.modifier)) { + if (drm_is_afbc(rsrc->image.layout.modifier)) { struct panfrost_resource *staging = pan_alloc_staging(ctx, rsrc, level, box); /* Staging resources have one LOD: level 0. Query the strides * on this LOD. */ - transfer->base.stride = staging->layout.slices[0].line_stride; + transfer->base.stride = staging->image.layout.slices[0].line_stride; transfer->base.layer_stride = - panfrost_get_layer_stride(&staging->layout, 0); + panfrost_get_layer_stride(&staging->image.layout, 0); transfer->staging.rsrc = &staging->base; @@ -953,16 +951,16 @@ panfrost_ptr_map(struct pipe_context *pctx, /* TODO: Eliminate this flush. It's only there to determine if * we're initialized or not, when the initialization could come * from a pending batch XXX */ - panfrost_flush_batches_accessing_bo(ctx, rsrc->bo, true); + panfrost_flush_batches_accessing_bo(ctx, rsrc->image.bo, true); if ((usage & PIPE_MAP_READ) && rsrc->state.slices[level].data_valid) { pan_blit_to_staging(pctx, transfer); - panfrost_flush_batches_accessing_bo(ctx, staging->bo, true); - panfrost_bo_wait(staging->bo, INT64_MAX, false); + panfrost_flush_batches_accessing_bo(ctx, staging->image.bo, true); + panfrost_bo_wait(staging->image.bo, INT64_MAX, false); } - panfrost_bo_mmap(staging->bo); - return staging->bo->ptr.cpu; + panfrost_bo_mmap(staging->image.bo); + return staging->image.bo->ptr.cpu; } /* If we haven't already mmaped, now's the time */ @@ -1015,13 +1013,13 @@ panfrost_ptr_map(struct pipe_context *pctx, if (newbo) { if (copy_resource) - memcpy(newbo->ptr.cpu, rsrc->bo->ptr.cpu, bo->size); + memcpy(newbo->ptr.cpu, rsrc->image.bo->ptr.cpu, bo->size); panfrost_bo_unreference(bo); - rsrc->bo = newbo; + rsrc->image.bo = newbo; if (!copy_resource && - drm_is_afbc(rsrc->layout.modifier)) + drm_is_afbc(rsrc->image.layout.modifier)) panfrost_resource_init_afbc_headers(rsrc); bo = newbo; @@ -1047,7 +1045,7 @@ panfrost_ptr_map(struct pipe_context *pctx, } } - if (rsrc->layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED) { + if (rsrc->image.layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED) { transfer->base.stride = box->width * bytes_per_pixel; transfer->base.layer_stride = transfer->base.stride * box->height; transfer->map = ralloc_size(transfer, transfer->base.layer_stride * box->depth); @@ -1056,16 +1054,16 @@ panfrost_ptr_map(struct pipe_context *pctx, if ((usage & PIPE_MAP_READ) && rsrc->state.slices[level].data_valid) { panfrost_load_tiled_image( transfer->map, - bo->ptr.cpu + rsrc->layout.slices[level].offset, + bo->ptr.cpu + rsrc->image.layout.slices[level].offset, box->x, box->y, box->width, box->height, transfer->base.stride, - rsrc->layout.slices[level].line_stride, - rsrc->layout.format); + rsrc->image.layout.slices[level].line_stride, + rsrc->image.layout.format); } return transfer->map; } else { - assert (rsrc->layout.modifier == DRM_FORMAT_MOD_LINEAR); + assert (rsrc->image.layout.modifier == DRM_FORMAT_MOD_LINEAR); /* Direct, persistent writes create holes in time for * caching... I don't know if this is actually possible but we @@ -1076,9 +1074,9 @@ panfrost_ptr_map(struct pipe_context *pctx, if ((usage & dpw) == dpw && rsrc->index_cache) return NULL; - transfer->base.stride = rsrc->layout.slices[level].line_stride; + transfer->base.stride = rsrc->image.layout.slices[level].line_stride; transfer->base.layer_stride = - panfrost_get_layer_stride(&rsrc->layout, level); + panfrost_get_layer_stride(&rsrc->image.layout, level); /* By mapping direct-write, we're implicitly already * initialized (maybe), so be conservative */ @@ -1089,9 +1087,9 @@ panfrost_ptr_map(struct pipe_context *pctx, } return bo->ptr.cpu - + rsrc->layout.slices[level].offset + + rsrc->image.layout.slices[level].offset + transfer->base.box.z * transfer->base.layer_stride - + transfer->base.box.y * rsrc->layout.slices[level].line_stride + + transfer->base.box.y * rsrc->image.layout.slices[level].line_stride + transfer->base.box.x * bytes_per_pixel; } } @@ -1134,12 +1132,12 @@ pan_resource_modifier_convert(struct panfrost_context *ctx, panfrost_blit(&ctx->base, &blit); } - panfrost_bo_unreference(rsrc->bo); + panfrost_bo_unreference(rsrc->image.bo); if (rsrc->checksum_bo) panfrost_bo_unreference(rsrc->checksum_bo); - rsrc->bo = tmp_rsrc->bo; - panfrost_bo_reference(rsrc->bo); + rsrc->image.bo = tmp_rsrc->image.bo; + panfrost_bo_reference(rsrc->image.bo); panfrost_resource_setup(pan_device(ctx->base.screen), rsrc, NULL, modifier); pipe_resource_reference(&tmp_prsrc, NULL); @@ -1199,17 +1197,17 @@ panfrost_ptr_unmap(struct pipe_context *pctx, if (transfer->usage & PIPE_MAP_WRITE) { if (panfrost_should_linear_convert(prsrc, transfer)) { - panfrost_bo_unreference(prsrc->bo); + panfrost_bo_unreference(prsrc->image.bo); if (prsrc->checksum_bo) panfrost_bo_unreference(prsrc->checksum_bo); panfrost_resource_setup(dev, prsrc, NULL, DRM_FORMAT_MOD_LINEAR); - prsrc->bo = pan_resource(trans->staging.rsrc)->bo; - panfrost_bo_reference(prsrc->bo); + prsrc->image.bo = pan_resource(trans->staging.rsrc)->image.bo; + panfrost_bo_reference(prsrc->image.bo); } else { pan_blit_from_staging(pctx, trans); - panfrost_flush_batches_accessing_bo(pan_context(pctx), pan_resource(trans->staging.rsrc)->bo, true); + panfrost_flush_batches_accessing_bo(pan_context(pctx), pan_resource(trans->staging.rsrc)->image.bo, true); } } @@ -1218,12 +1216,12 @@ panfrost_ptr_unmap(struct pipe_context *pctx, /* Tiling will occur in software from a staging cpu buffer */ if (trans->map) { - struct panfrost_bo *bo = prsrc->bo; + struct panfrost_bo *bo = prsrc->image.bo; if (transfer->usage & PIPE_MAP_WRITE) { prsrc->state.slices[transfer->level].data_valid = true; - if (prsrc->layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED) { + if (prsrc->image.layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED) { assert(transfer->box.depth == 1); if (panfrost_should_linear_convert(prsrc, transfer)) { @@ -1232,14 +1230,14 @@ panfrost_ptr_unmap(struct pipe_context *pctx, panfrost_resource_setup(dev, prsrc, &bo_size, DRM_FORMAT_MOD_LINEAR); if (bo_size > bo->size) { panfrost_bo_unreference(bo); - bo = prsrc->bo = panfrost_bo_create(dev, bo_size, 0); + bo = prsrc->image.bo = panfrost_bo_create(dev, bo_size, 0); assert(bo); } util_copy_rect( - bo->ptr.cpu + prsrc->layout.slices[0].offset, + bo->ptr.cpu + prsrc->image.layout.slices[0].offset, prsrc->base.format, - prsrc->layout.slices[0].line_stride, + prsrc->image.layout.slices[0].line_stride, 0, 0, transfer->box.width, transfer->box.height, @@ -1248,13 +1246,13 @@ panfrost_ptr_unmap(struct pipe_context *pctx, 0, 0); } else { panfrost_store_tiled_image( - bo->ptr.cpu + prsrc->layout.slices[transfer->level].offset, + bo->ptr.cpu + prsrc->image.layout.slices[transfer->level].offset, trans->map, transfer->box.x, transfer->box.y, transfer->box.width, transfer->box.height, - prsrc->layout.slices[transfer->level].line_stride, + prsrc->image.layout.slices[transfer->level].line_stride, transfer->stride, - prsrc->layout.format); + prsrc->image.layout.format); } } } @@ -1301,7 +1299,7 @@ static enum pipe_format panfrost_resource_get_internal_format(struct pipe_resource *rsrc) { struct panfrost_resource *prsrc = (struct panfrost_resource *) rsrc; - return prsrc->layout.format; + return prsrc->image.layout.format; } static bool @@ -1320,7 +1318,7 @@ panfrost_generate_mipmap( * explicit so we don't try to wallpaper them back and end up with * u_blitter recursion */ - assert(rsrc->bo); + assert(rsrc->image.bo); for (unsigned l = base_level + 1; l <= last_level; ++l) rsrc->state.slices[l].data_valid = false; @@ -1345,8 +1343,8 @@ panfrost_get_texture_address(struct panfrost_resource *rsrc, bool is_3d = rsrc->base.target == PIPE_TEXTURE_3D; unsigned array_idx = is_3d ? 0 : layer; unsigned surface_idx = is_3d ? layer : sample; - return rsrc->bo->ptr.gpu + - panfrost_texture_offset(&rsrc->layout, level, + return rsrc->image.bo->ptr.gpu + + panfrost_texture_offset(&rsrc->image.layout, level, array_idx, surface_idx); } @@ -1355,19 +1353,19 @@ panfrost_get_afbc_pointers(struct panfrost_resource *rsrc, unsigned level, unsigned layer, mali_ptr *header, mali_ptr *body) { - assert(drm_is_afbc(rsrc->layout.modifier)); + assert(drm_is_afbc(rsrc->image.layout.modifier)); - struct pan_image_slice_layout *slice = &rsrc->layout.slices[level]; + struct pan_image_slice_layout *slice = &rsrc->image.layout.slices[level]; if (rsrc->base.target == PIPE_TEXTURE_3D) { - *header = rsrc->bo->ptr.gpu + slice->offset + + *header = rsrc->image.bo->ptr.gpu + slice->offset + (layer * slice->afbc.surface_stride); - *body = rsrc->bo->ptr.gpu + slice->offset + + *body = rsrc->image.bo->ptr.gpu + slice->offset + slice->afbc.header_size + (slice->surface_stride * layer); } else { - *header = rsrc->bo->ptr.gpu + - panfrost_texture_offset(&rsrc->layout, + *header = rsrc->image.bo->ptr.gpu + + panfrost_texture_offset(&rsrc->image.layout, level, layer, 0); *body = *header + slice->afbc.header_size; } diff --git a/src/gallium/drivers/panfrost/pan_resource.h b/src/gallium/drivers/panfrost/pan_resource.h index b825562b1af..1a701f1da4f 100644 --- a/src/gallium/drivers/panfrost/pan_resource.h +++ b/src/gallium/drivers/panfrost/pan_resource.h @@ -45,7 +45,6 @@ struct panfrost_resource { unsigned inverted_len; } damage; - struct panfrost_bo *bo; struct renderonly_scanout *scanout; struct panfrost_resource *separate_stencil; @@ -53,7 +52,7 @@ struct panfrost_resource { struct util_range valid_buffer_range; /* Description of the resource layout */ - struct pan_image_layout layout; + struct pan_image image; /* Image state */ struct pan_image_state state; diff --git a/src/gallium/drivers/panfrost/pan_sfbd.c b/src/gallium/drivers/panfrost/pan_sfbd.c index dbe37df4e13..5dcfeca104b 100644 --- a/src/gallium/drivers/panfrost/pan_sfbd.c +++ b/src/gallium/drivers/panfrost/pan_sfbd.c @@ -84,7 +84,7 @@ panfrost_sfbd_set_cbuf( unsigned level = surf->u.tex.level; unsigned first_layer = surf->u.tex.first_layer; assert(surf->u.tex.last_layer == first_layer); - signed row_stride = rsrc->layout.slices[level].row_stride; + signed row_stride = rsrc->image.layout.slices[level].row_stride; mali_ptr base = panfrost_get_texture_address(rsrc, level, first_layer, 0); @@ -94,9 +94,9 @@ panfrost_sfbd_set_cbuf( fb->color_writeback.base = base; fb->color_writeback.row_stride = row_stride; - if (rsrc->layout.modifier == DRM_FORMAT_MOD_LINEAR) + if (rsrc->image.layout.modifier == DRM_FORMAT_MOD_LINEAR) fb->color_block_format = MALI_BLOCK_FORMAT_LINEAR; - else if (rsrc->layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED) { + else if (rsrc->image.layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED) { fb->color_block_format = MALI_BLOCK_FORMAT_TILED_U_INTERLEAVED; } else { fprintf(stderr, "Invalid render modifier\n"); @@ -114,12 +114,12 @@ panfrost_sfbd_set_zsbuf( unsigned level = surf->u.tex.level; assert(surf->u.tex.first_layer == 0); - fb->zs_writeback.base = rsrc->bo->ptr.gpu + rsrc->layout.slices[level].offset; - fb->zs_writeback.row_stride = rsrc->layout.slices[level].row_stride; + fb->zs_writeback.base = rsrc->image.bo->ptr.gpu + rsrc->image.layout.slices[level].offset; + fb->zs_writeback.row_stride = rsrc->image.layout.slices[level].row_stride; - if (rsrc->layout.modifier == DRM_FORMAT_MOD_LINEAR) + if (rsrc->image.layout.modifier == DRM_FORMAT_MOD_LINEAR) fb->zs_block_format = MALI_BLOCK_FORMAT_LINEAR; - else if (rsrc->layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED) { + else if (rsrc->image.layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED) { fb->zs_block_format = MALI_BLOCK_FORMAT_TILED_U_INTERLEAVED; } else { fprintf(stderr, "Invalid render modifier\n"); @@ -222,13 +222,13 @@ panfrost_sfbd_fragment(struct panfrost_batch *batch, bool has_draws) if (batch->key.nr_cbufs && batch->key.cbufs[0]) { struct pipe_surface *surf = batch->key.cbufs[0]; struct panfrost_resource *rsrc = pan_resource(surf->texture); - struct panfrost_bo *bo = rsrc->bo; + struct panfrost_bo *bo = rsrc->image.bo; panfrost_sfbd_set_cbuf(¶ms, surf); if (rsrc->checksummed) { unsigned level = surf->u.tex.level; - struct pan_image_slice_layout *slice = &rsrc->layout.slices[level]; + struct pan_image_slice_layout *slice = &rsrc->image.layout.slices[level]; params.crc_buffer.row_stride = slice->crc.stride; params.crc_buffer.base = bo->ptr.gpu + slice->crc.offset; diff --git a/src/panfrost/lib/pan_blit.c b/src/panfrost/lib/pan_blit.c index 9d8d7970dc9..64d5b9319e2 100644 --- a/src/panfrost/lib/pan_blit.c +++ b/src/panfrost/lib/pan_blit.c @@ -211,11 +211,11 @@ panfrost_init_blit_shaders(struct panfrost_device *dev) static void panfrost_load_emit_viewport(struct pan_pool *pool, struct MALI_DRAW *draw, - struct pan_image *image) + struct pan_image_view *iview) { struct panfrost_ptr t = panfrost_pool_alloc_desc(pool, VIEWPORT); - unsigned width = u_minify(image->layout->width, image->first_level); - unsigned height = u_minify(image->layout->height, image->first_level); + unsigned width = u_minify(iview->image->layout.width, iview->first_level); + unsigned height = u_minify(iview->image->layout.height, iview->first_level); pan_pack(t.cpu, VIEWPORT, cfg) { cfg.scissor_maximum_x = width - 1; /* Inclusive */ @@ -227,16 +227,16 @@ panfrost_load_emit_viewport(struct pan_pool *pool, struct MALI_DRAW *draw, static void panfrost_load_prepare_rsd(struct pan_pool *pool, struct MALI_RENDERER_STATE *state, - struct pan_image *image, unsigned loc) + struct pan_image_view *iview, unsigned loc) { /* Determine the sampler type needed. Stencil is always sampled as * UINT. Pure (U)INT is always (U)INT. Everything else is FLOAT. */ enum pan_blit_type T = (loc == FRAG_RESULT_STENCIL) ? PAN_BLIT_UINT : - (util_format_is_pure_uint(image->format)) ? PAN_BLIT_UINT : - (util_format_is_pure_sint(image->format)) ? PAN_BLIT_INT : + (util_format_is_pure_uint(iview->format)) ? PAN_BLIT_UINT : + (util_format_is_pure_sint(iview->format)) ? PAN_BLIT_INT : PAN_BLIT_FLOAT; - bool ms = image->layout->nr_samples > 1; + bool ms = iview->image->layout.nr_samples > 1; const struct pan_blit_shader *shader = &pool->dev->blit_shaders.loads[loc][T][ms]; @@ -306,12 +306,12 @@ panfrost_load_emit_varying(struct pan_pool *pool, struct MALI_DRAW *draw, static void midgard_load_emit_texture(struct pan_pool *pool, struct MALI_DRAW *draw, - struct pan_image *image) + struct pan_image_view *iview) { struct panfrost_ptr texture = panfrost_pool_alloc_desc_aggregate(pool, PAN_DESC(MIDGARD_TEXTURE), - PAN_DESC_ARRAY(image->layout->nr_samples, + PAN_DESC_ARRAY(iview->image->layout.nr_samples, SURFACE_WITH_STRIDE)); struct panfrost_ptr payload = { @@ -329,21 +329,21 @@ midgard_load_emit_texture(struct pan_pool *pool, struct MALI_DRAW *draw, * 2D and 3D variants */ unsigned offset = - image->first_layer * - panfrost_get_layer_stride(image->layout, image->first_level); + iview->first_layer * + panfrost_get_layer_stride(&iview->image->layout, iview->first_level); unsigned char swizzle[4] = { PIPE_SWIZZLE_X, PIPE_SWIZZLE_Y, PIPE_SWIZZLE_Z, PIPE_SWIZZLE_W }; - panfrost_new_texture(pool->dev, image->layout, texture.cpu, - image->layout->width, image->layout->height, 1, 1, - image->format, MALI_TEXTURE_DIMENSION_2D, - image->first_level, image->last_level, + panfrost_new_texture(pool->dev, &iview->image->layout, texture.cpu, + iview->image->layout.width, iview->image->layout.height, 1, 1, + iview->format, MALI_TEXTURE_DIMENSION_2D, + iview->first_level, iview->last_level, 0, 0, - image->layout->nr_samples, + iview->image->layout.nr_samples, swizzle, - image->bo->ptr.gpu + offset, &payload); + iview->image->bo->ptr.gpu + offset, &payload); pan_pack(sampler.cpu, MIDGARD_SAMPLER, cfg) cfg.normalized_coordinates = false; @@ -354,11 +354,11 @@ midgard_load_emit_texture(struct pan_pool *pool, struct MALI_DRAW *draw, static void midgard_load_emit_blend_rt(struct pan_pool *pool, void *out, - mali_ptr blend_shader, struct pan_image *image, + mali_ptr blend_shader, struct pan_image_view *iview, unsigned rt, unsigned loc) { bool disabled = loc != (FRAG_RESULT_DATA0 + rt); - bool srgb = util_format_is_srgb(image->format); + bool srgb = util_format_is_srgb(iview->format); pan_pack(out, BLEND, cfg) { if (disabled) { @@ -392,17 +392,17 @@ midgard_load_emit_blend_rt(struct pan_pool *pool, void *out, static void midgard_load_emit_rsd(struct pan_pool *pool, struct MALI_DRAW *draw, - mali_ptr blend_shader, struct pan_image *image, + mali_ptr blend_shader, struct pan_image_view *iview, unsigned loc) { struct panfrost_ptr t = panfrost_pool_alloc_desc_aggregate(pool, PAN_DESC(RENDERER_STATE), PAN_DESC_ARRAY(8, BLEND)); - bool srgb = util_format_is_srgb(image->format); + bool srgb = util_format_is_srgb(iview->format); pan_pack(t.cpu, RENDERER_STATE, cfg) { - panfrost_load_prepare_rsd(pool, &cfg, image, loc); + panfrost_load_prepare_rsd(pool, &cfg, iview, loc); cfg.properties.midgard.work_register_count = 4; cfg.properties.midgard.force_early_z = (loc >= FRAG_RESULT_DATA0); cfg.stencil_mask_misc.alpha_test_compare_function = MALI_FUNC_ALWAYS; @@ -435,7 +435,7 @@ midgard_load_emit_rsd(struct pan_pool *pool, struct MALI_DRAW *draw, for (unsigned i = 0; i < 8; ++i) { void *dest = t.cpu + MALI_RENDERER_STATE_LENGTH + MALI_BLEND_LENGTH * i; - midgard_load_emit_blend_rt(pool, dest, blend_shader, image, i, loc); + midgard_load_emit_blend_rt(pool, dest, blend_shader, iview, i, loc); } draw->state = t.gpu; @@ -450,7 +450,7 @@ panfrost_load_midg(struct pan_pool *pool, mali_ptr blend_shader, mali_ptr fbd, mali_ptr coordinates, unsigned vertex_count, - struct pan_image *image, + struct pan_image_view *iview, unsigned loc) { struct panfrost_ptr t = @@ -462,10 +462,10 @@ panfrost_load_midg(struct pan_pool *pool, cfg.four_components_per_vertex = true; panfrost_load_emit_varying(pool, &cfg, coordinates, vertex_count); - midgard_load_emit_texture(pool, &cfg, image); - panfrost_load_emit_viewport(pool, &cfg, image); + midgard_load_emit_texture(pool, &cfg, iview); + panfrost_load_emit_viewport(pool, &cfg, iview); cfg.fbd = fbd; - midgard_load_emit_rsd(pool, &cfg, blend_shader, image, loc); + midgard_load_emit_rsd(pool, &cfg, blend_shader, iview, loc); } pan_section_pack(t.cpu, MIDGARD_TILER_JOB, PRIMITIVE, cfg) { @@ -489,12 +489,12 @@ panfrost_load_midg(struct pan_pool *pool, static void bifrost_load_emit_texture(struct pan_pool *pool, struct MALI_DRAW *draw, - struct pan_image *image) + struct pan_image_view *iview) { struct panfrost_ptr texture = panfrost_pool_alloc_desc_aggregate(pool, PAN_DESC(BIFROST_TEXTURE), - PAN_DESC_ARRAY(image->layout->nr_samples, + PAN_DESC_ARRAY(iview->image->layout.nr_samples, SURFACE_WITH_STRIDE)); struct panfrost_ptr sampler = panfrost_pool_alloc_desc(pool, BIFROST_SAMPLER); @@ -504,21 +504,21 @@ bifrost_load_emit_texture(struct pan_pool *pool, struct MALI_DRAW *draw, }; unsigned offset = - image->first_layer * - panfrost_get_layer_stride(image->layout, image->first_level); + iview->first_layer * + panfrost_get_layer_stride(&iview->image->layout, iview->first_level); unsigned char swizzle[4] = { PIPE_SWIZZLE_X, PIPE_SWIZZLE_Y, PIPE_SWIZZLE_Z, PIPE_SWIZZLE_W }; - panfrost_new_texture(pool->dev, image->layout, texture.cpu, - image->layout->width, image->layout->height, 1, 1, - image->format, MALI_TEXTURE_DIMENSION_2D, - image->first_level, image->last_level, + panfrost_new_texture(pool->dev, &iview->image->layout, texture.cpu, + iview->image->layout.width, iview->image->layout.height, 1, 1, + iview->format, MALI_TEXTURE_DIMENSION_2D, + iview->first_level, iview->last_level, 0, 0, - image->layout->nr_samples, + iview->image->layout.nr_samples, swizzle, - image->bo->ptr.gpu + offset, &payload); + iview->image->bo->ptr.gpu + offset, &payload); pan_pack(sampler.cpu, BIFROST_SAMPLER, cfg) { cfg.seamless_cube_map = false; @@ -548,16 +548,16 @@ blit_type_to_reg_fmt(enum pan_blit_type btype) static void bifrost_load_emit_blend_rt(struct pan_pool *pool, void *out, - mali_ptr blend_shader, struct pan_image *image, + mali_ptr blend_shader, struct pan_image_view *iview, unsigned rt, unsigned loc) { enum pan_blit_type T = (loc == FRAG_RESULT_STENCIL) ? PAN_BLIT_UINT : - (util_format_is_pure_uint(image->format)) ? PAN_BLIT_UINT : - (util_format_is_pure_sint(image->format)) ? PAN_BLIT_INT : + (util_format_is_pure_uint(iview->format)) ? PAN_BLIT_UINT : + (util_format_is_pure_sint(iview->format)) ? PAN_BLIT_INT : PAN_BLIT_FLOAT; bool disabled = loc != (FRAG_RESULT_DATA0 + rt); - bool srgb = util_format_is_srgb(image->format); + bool srgb = util_format_is_srgb(iview->format); pan_pack(out, BLEND, cfg) { if (disabled) { @@ -575,7 +575,7 @@ bifrost_load_emit_blend_rt(struct pan_pool *pool, void *out, cfg.bifrost.internal.shader.pc = blend_shader; } else { const struct util_format_description *format_desc = - util_format_description(image->format); + util_format_description(iview->format); cfg.bifrost.equation.rgb.a = MALI_BLEND_OPERAND_A_SRC; cfg.bifrost.equation.rgb.b = MALI_BLEND_OPERAND_B_SRC; @@ -597,7 +597,7 @@ bifrost_load_emit_blend_rt(struct pan_pool *pool, void *out, static void bifrost_load_emit_rsd(struct pan_pool *pool, struct MALI_DRAW *draw, - mali_ptr blend_shader, struct pan_image *image, + mali_ptr blend_shader, struct pan_image_view *iview, unsigned loc) { struct panfrost_ptr t = @@ -606,7 +606,7 @@ bifrost_load_emit_rsd(struct pan_pool *pool, struct MALI_DRAW *draw, PAN_DESC_ARRAY(8, BLEND)); pan_pack(t.cpu, RENDERER_STATE, cfg) { - panfrost_load_prepare_rsd(pool, &cfg, image, loc); + panfrost_load_prepare_rsd(pool, &cfg, iview, loc); if (loc >= FRAG_RESULT_DATA0) { cfg.properties.bifrost.zs_update_operation = MALI_PIXEL_KILL_STRONG_EARLY; @@ -620,13 +620,13 @@ bifrost_load_emit_rsd(struct pan_pool *pool, struct MALI_DRAW *draw, } cfg.properties.bifrost.allow_forward_pixel_to_kill = true; cfg.preload.fragment.coverage = true; - cfg.preload.fragment.sample_mask_id = image->layout->nr_samples > 1; + cfg.preload.fragment.sample_mask_id = iview->image->layout.nr_samples > 1; } for (unsigned i = 0; i < 8; ++i) { void *dest = t.cpu + MALI_RENDERER_STATE_LENGTH + MALI_BLEND_LENGTH * i; - bifrost_load_emit_blend_rt(pool, dest, blend_shader, image, i, loc); + bifrost_load_emit_blend_rt(pool, dest, blend_shader, iview, i, loc); } draw->state = t.gpu; @@ -639,7 +639,7 @@ panfrost_load_bifrost(struct pan_pool *pool, mali_ptr thread_storage, mali_ptr tiler, mali_ptr coordinates, unsigned vertex_count, - struct pan_image *image, + struct pan_image_view *iview, unsigned loc) { struct panfrost_ptr t = @@ -650,10 +650,10 @@ panfrost_load_bifrost(struct pan_pool *pool, cfg.draw_descriptor_is_64b = true; panfrost_load_emit_varying(pool, &cfg, coordinates, vertex_count); - bifrost_load_emit_texture(pool, &cfg, image); - panfrost_load_emit_viewport(pool, &cfg, image); + bifrost_load_emit_texture(pool, &cfg, iview); + panfrost_load_emit_viewport(pool, &cfg, iview); cfg.thread_storage = thread_storage; - bifrost_load_emit_rsd(pool, &cfg, blend_shader, image, loc); + bifrost_load_emit_rsd(pool, &cfg, blend_shader, iview, loc); } pan_section_pack(t.cpu, BIFROST_TILER_JOB, PRIMITIVE, cfg) { diff --git a/src/panfrost/lib/pan_texture.h b/src/panfrost/lib/pan_texture.h index 6ac54d18888..3b5be1a80d7 100644 --- a/src/panfrost/lib/pan_texture.h +++ b/src/panfrost/lib/pan_texture.h @@ -97,13 +97,19 @@ struct pan_image_state { }; struct pan_image { - /* Format and size */ + struct panfrost_bo *bo; + struct pan_image_layout layout; +}; + +struct pan_image_view { + /* Format, dimension and sample count of the view might differ from + * those of the image (2D view of a 3D image surface for instance). + */ enum pipe_format format; enum mali_texture_dimension dim; unsigned first_level, last_level; unsigned first_layer, last_layer; - struct panfrost_bo *bo; - const struct pan_image_layout *layout; + const struct pan_image *image; }; unsigned @@ -243,7 +249,7 @@ panfrost_load_midg( mali_ptr blend_shader, mali_ptr fbd, mali_ptr coordinates, unsigned vertex_count, - struct pan_image *image, + struct pan_image_view *iview, unsigned loc); void @@ -253,7 +259,7 @@ panfrost_load_bifrost(struct pan_pool *pool, mali_ptr thread_storage, mali_ptr tiler, mali_ptr coordinates, unsigned vertex_count, - struct pan_image *image, + struct pan_image_view *iview, unsigned loc); /* DRM modifier helper */