From 8b1e273cb5b7d10919c87060d201ddb46f9dde7d Mon Sep 17 00:00:00 2001
From: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Date: Mon, 31 May 2021 15:29:20 -0400
Subject: [PATCH] asahi: Scaffold format table

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
---
 src/asahi/lib/agx_formats.c           | 14 ++++++++++++++
 src/asahi/lib/agx_formats.h           |  9 +++++++++
 src/gallium/drivers/asahi/agx_state.c |  9 ++-------
 3 files changed, 25 insertions(+), 7 deletions(-)

diff --git a/src/asahi/lib/agx_formats.c b/src/asahi/lib/agx_formats.c
index 270448dad6c..b685427a101 100644
--- a/src/asahi/lib/agx_formats.c
+++ b/src/asahi/lib/agx_formats.c
@@ -21,8 +21,22 @@
  * SOFTWARE.
  */
 
+#include "agx_pack.h"
 #include "agx_formats.h"
 
+#define T true
+#define F false
+
+#define AGX_FMT(pipe, channels, type, is_renderable) \
+   [PIPE_FORMAT_ ## pipe] = { \
+      .hw = (AGX_CHANNELS_ ## channels) | ((AGX_TEXTURE_TYPE_ ## type) << 7), \
+      .renderable = is_renderable \
+   }
+
+const struct agx_pixel_format_entry agx_pixel_format[PIPE_FORMAT_COUNT] = {
+   AGX_FMT(B8G8R8A8_UNORM,          R8G8B8A8,         UNORM,      T),
+};
+
 const enum agx_format
 agx_vertex_format[PIPE_FORMAT_COUNT] = {
    [PIPE_FORMAT_R32_FLOAT] = AGX_FORMAT_I32,
diff --git a/src/asahi/lib/agx_formats.h b/src/asahi/lib/agx_formats.h
index 7ce52b91b3d..052e30d03c9 100644
--- a/src/asahi/lib/agx_formats.h
+++ b/src/asahi/lib/agx_formats.h
@@ -28,6 +28,15 @@
 #include "util/format/u_format.h"
 #include "asahi/compiler/agx_compile.h"
 
+/* N.b. hardware=0 corresponds to R8 UNORM, which is renderable. So a zero
+ * entry indicates an invalid format. */
+
+struct agx_pixel_format_entry {
+   uint16_t hw;
+   bool renderable : 1;
+};
+
+extern const struct agx_pixel_format_entry agx_pixel_format[PIPE_FORMAT_COUNT];
 extern const enum agx_format agx_vertex_format[PIPE_FORMAT_COUNT];
 
 #endif
diff --git a/src/gallium/drivers/asahi/agx_state.c b/src/gallium/drivers/asahi/agx_state.c
index dbbfdd32f9f..b7186884566 100644
--- a/src/gallium/drivers/asahi/agx_state.c
+++ b/src/gallium/drivers/asahi/agx_state.c
@@ -268,9 +268,6 @@ agx_bind_sampler_states(struct pipe_context *pctx,
           sizeof(struct agx_bo *) * count);
 }
 
-#define AGX_TEXTURE_FORMAT(channels, type) \
-   ((AGX_CHANNELS_ ## channels) | ((AGX_TEXTURE_TYPE_ ## type) << 7))
-
 /* Channels agree for RGBA but are weird for force 0/1 */
 
 static enum agx_channel
@@ -336,9 +333,8 @@ agx_create_sampler_view(struct pipe_context *pctx,
 
    /* Pack the descriptor into GPU memory */
    agx_pack(so->desc->ptr.cpu, TEXTURE, cfg) {
-      assert(state->format == PIPE_FORMAT_B8G8R8A8_UNORM); // TODO: format table
       cfg.layout = agx_translate_layout(rsrc->modifier);
-      cfg.format = AGX_TEXTURE_FORMAT(R8G8B8A8, UNORM);
+      cfg.format = agx_pixel_format[state->format].hw;
       cfg.swizzle_r = agx_channel_from_pipe(out_swizzle[0]);
       cfg.swizzle_g = agx_channel_from_pipe(out_swizzle[1]);
       cfg.swizzle_b = agx_channel_from_pipe(out_swizzle[2]);
@@ -578,9 +574,8 @@ agx_set_framebuffer_state(struct pipe_context *pctx,
       struct agx_resource *tex = agx_resource(surf->texture);
 
       agx_pack(ctx->render_target[i], RENDER_TARGET, cfg) {
-         assert(surf->format == PIPE_FORMAT_B8G8R8A8_UNORM); // TODO: format table
          cfg.layout = agx_translate_layout(tex->modifier);
-         cfg.format = AGX_TEXTURE_FORMAT(R8G8B8A8, UNORM);
+         cfg.format = agx_pixel_format[surf->format].hw;
          cfg.swizzle_r = AGX_CHANNEL_B;
          cfg.swizzle_g = AGX_CHANNEL_G;
          cfg.swizzle_b = AGX_CHANNEL_R;