diff --git a/src/gallium/drivers/radeonsi/si_barrier.c b/src/gallium/drivers/radeonsi/si_barrier.c index e199b6454dd..08f5d1d7566 100644 --- a/src/gallium/drivers/radeonsi/si_barrier.c +++ b/src/gallium/drivers/radeonsi/si_barrier.c @@ -641,7 +641,7 @@ static void si_texture_barrier(struct pipe_context *ctx, unsigned flags) { struct si_context *sctx = (struct si_context *)ctx; - si_update_fb_dirtiness_after_rendering(sctx); + si_fb_barrier_after_rendering(sctx); /* Multisample surfaces are flushed in si_decompress_textures. */ if (sctx->framebuffer.uncompressed_cb_mask) { @@ -718,6 +718,52 @@ static void si_memory_barrier(struct pipe_context *ctx, unsigned flags) si_mark_atom_dirty(sctx, &sctx->atoms.s.barrier); } +static void si_set_sampler_depth_decompress_mask(struct si_context *sctx, struct si_texture *tex) +{ + assert(sctx->gfx_level < GFX12); + + /* Check all sampler bindings in all shaders where depth textures are bound, and update + * which samplers should be decompressed. + */ + u_foreach_bit(sh, sctx->shader_has_depth_tex) { + u_foreach_bit(i, sctx->samplers[sh].has_depth_tex_mask) { + if (sctx->samplers[sh].views[i]->texture == &tex->buffer.b.b) { + sctx->samplers[sh].needs_depth_decompress_mask |= 1 << i; + sctx->shader_needs_decompress_mask |= 1 << sh; + } + } + } +} + +void si_fb_barrier_after_rendering(struct si_context *sctx) +{ + if (sctx->gfx_level < GFX12 && !sctx->decompression_enabled) { + if (sctx->framebuffer.state.zsbuf) { + struct pipe_surface *surf = sctx->framebuffer.state.zsbuf; + struct si_texture *tex = (struct si_texture *)surf->texture; + + tex->dirty_level_mask |= 1 << surf->u.tex.level; + + if (tex->surface.has_stencil) + tex->stencil_dirty_level_mask |= 1 << surf->u.tex.level; + + si_set_sampler_depth_decompress_mask(sctx, tex); + } + + unsigned compressed_cb_mask = sctx->framebuffer.compressed_cb_mask; + while (compressed_cb_mask) { + unsigned i = u_bit_scan(&compressed_cb_mask); + struct pipe_surface *surf = sctx->framebuffer.state.cbufs[i]; + struct si_texture *tex = (struct si_texture *)surf->texture; + + if (tex->surface.fmask_offset) { + tex->dirty_level_mask |= 1 << surf->u.tex.level; + tex->fmask_is_identity = false; + } + } + } +} + void si_init_barrier_functions(struct si_context *sctx) { if (sctx->gfx_level >= GFX10) diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c index 7d1ff1ba4f4..3b9527017cb 100644 --- a/src/gallium/drivers/radeonsi/si_blit.c +++ b/src/gallium/drivers/radeonsi/si_blit.c @@ -933,7 +933,7 @@ void si_decompress_subresource(struct pipe_context *ctx, struct pipe_resource *t */ if (sctx->framebuffer.state.zsbuf && sctx->framebuffer.state.zsbuf->u.tex.level == level && sctx->framebuffer.state.zsbuf->texture == tex) - si_update_fb_dirtiness_after_rendering(sctx); + si_fb_barrier_after_rendering(sctx); si_decompress_depth(sctx, stex, planes, level, level, first_layer, last_layer); } else if (stex->surface.fmask_size || stex->cmask_buffer || @@ -946,7 +946,7 @@ void si_decompress_subresource(struct pipe_context *ctx, struct pipe_resource *t if (sctx->framebuffer.state.cbufs[i] && sctx->framebuffer.state.cbufs[i]->u.tex.level == level && sctx->framebuffer.state.cbufs[i]->texture == tex) { - si_update_fb_dirtiness_after_rendering(sctx); + si_fb_barrier_after_rendering(sctx); break; } } diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c index 5544862dce9..07ec0b099b1 100644 --- a/src/gallium/drivers/radeonsi/si_compute.c +++ b/src/gallium/drivers/radeonsi/si_compute.c @@ -1187,7 +1187,7 @@ static void si_launch_grid(struct pipe_context *ctx, const struct pipe_grid_info if (sctx->has_graphics) { if (sctx->num_draw_calls_sh_coherent.with_cb != sctx->num_draw_calls || sctx->num_draw_calls_sh_coherent.with_db != sctx->num_draw_calls) { - si_update_fb_dirtiness_after_rendering(sctx); + si_fb_barrier_after_rendering(sctx); if (sctx->force_shader_coherency.with_cb || si_check_needs_implicit_sync(sctx, RADEON_USAGE_CB_NEEDS_IMPLICIT_SYNC)) { diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index 6a8e057058e..4dbddeb9d09 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -1380,6 +1380,7 @@ void si_barrier_before_simple_buffer_op(struct si_context *sctx, unsigned flags, struct pipe_resource *dst, struct pipe_resource *src); void si_barrier_after_simple_buffer_op(struct si_context *sctx, unsigned flags, struct pipe_resource *dst, struct pipe_resource *src); +void si_fb_barrier_after_rendering(struct si_context *sctx); void si_init_barrier_functions(struct si_context *sctx); /* si_blit.c */ diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 0eaadb53f65..03f27d5454c 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -2476,53 +2476,6 @@ static void si_init_depth_surface(struct si_context *sctx, struct si_surface *su surf->depth_initialized = true; } -void si_set_sampler_depth_decompress_mask(struct si_context *sctx, struct si_texture *tex) -{ - assert(sctx->gfx_level < GFX12); - - /* Check all sampler bindings in all shaders where depth textures are bound, and update - * which samplers should be decompressed. - */ - u_foreach_bit(sh, sctx->shader_has_depth_tex) { - u_foreach_bit(i, sctx->samplers[sh].has_depth_tex_mask) { - if (sctx->samplers[sh].views[i]->texture == &tex->buffer.b.b) { - sctx->samplers[sh].needs_depth_decompress_mask |= 1 << i; - sctx->shader_needs_decompress_mask |= 1 << sh; - } - } - } -} - -void si_update_fb_dirtiness_after_rendering(struct si_context *sctx) -{ - if (sctx->gfx_level >= GFX12 || sctx->decompression_enabled) - return; - - if (sctx->framebuffer.state.zsbuf) { - struct pipe_surface *surf = sctx->framebuffer.state.zsbuf; - struct si_texture *tex = (struct si_texture *)surf->texture; - - tex->dirty_level_mask |= 1 << surf->u.tex.level; - - if (tex->surface.has_stencil) - tex->stencil_dirty_level_mask |= 1 << surf->u.tex.level; - - si_set_sampler_depth_decompress_mask(sctx, tex); - } - - unsigned compressed_cb_mask = sctx->framebuffer.compressed_cb_mask; - while (compressed_cb_mask) { - unsigned i = u_bit_scan(&compressed_cb_mask); - struct pipe_surface *surf = sctx->framebuffer.state.cbufs[i]; - struct si_texture *tex = (struct si_texture *)surf->texture; - - if (tex->surface.fmask_offset) { - tex->dirty_level_mask |= 1 << surf->u.tex.level; - tex->fmask_is_identity = false; - } - } -} - static void si_dec_framebuffer_counters(const struct pipe_framebuffer_state *state) { for (int i = 0; i < state->nr_cbufs; ++i) { @@ -2594,7 +2547,7 @@ static void si_set_framebuffer_state(struct pipe_context *ctx, return; } - si_update_fb_dirtiness_after_rendering(sctx); + si_fb_barrier_after_rendering(sctx); /* Disable DCC if the formats are incompatible. */ if (sctx->gfx_level >= GFX8 && sctx->gfx_level < GFX11) { diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h index bc16d91cb11..2a662681984 100644 --- a/src/gallium/drivers/radeonsi/si_state.h +++ b/src/gallium/drivers/radeonsi/si_state.h @@ -628,8 +628,6 @@ void si_init_gfx_preamble_state(struct si_context *sctx); void si_make_buffer_descriptor(struct si_screen *screen, struct si_resource *buf, enum pipe_format format, unsigned offset, unsigned num_elements, uint32_t *state); -void si_set_sampler_depth_decompress_mask(struct si_context *sctx, struct si_texture *tex); -void si_update_fb_dirtiness_after_rendering(struct si_context *sctx); void si_mark_display_dcc_dirty(struct si_context *sctx, struct si_texture *tex); void si_update_ps_iter_samples(struct si_context *sctx); void si_save_qbo_state(struct si_context *sctx, struct si_qbo_state *st);