diff --git a/src/amd/common/nir/ac_nir_lower_intrinsics_to_args.c b/src/amd/common/nir/ac_nir_lower_intrinsics_to_args.c index 2c3bf077416..873da051d28 100644 --- a/src/amd/common/nir/ac_nir_lower_intrinsics_to_args.c +++ b/src/amd/common/nir/ac_nir_lower_intrinsics_to_args.c @@ -6,6 +6,7 @@ #include "ac_nir.h" #include "ac_nir_helpers.h" +#include "ac_gpu_info.h" #include "nir_builder.h" @@ -479,6 +480,13 @@ lower_intrinsic_to_arg(nir_builder *b, nir_intrinsic_instr *intrin, void *state) case nir_intrinsic_load_task_ring_entry_amd: replacement = ac_nir_load_arg(b, s->args, s->args->task_ring_entry); break; + case nir_intrinsic_load_ring_mesh_scratch_offset_amd: { + /* gs_tg_info[0:11] is ordered_wave_id. Multiply by the ring entry size. */ + nir_def *gs_tg_info = ac_nir_load_arg(b, s->args, s->args->gs_tg_info); + nir_def *ordered_wave_id = nir_iand_imm(b, gs_tg_info, 0xfff); + replacement = nir_imul_imm(b, ordered_wave_id, AC_MESH_SCRATCH_ENTRY_BYTES); + break; + } default: return false; } diff --git a/src/amd/vulkan/nir/radv_nir_lower_abi.c b/src/amd/vulkan/nir/radv_nir_lower_abi.c index bad2209020f..7a4644b7748 100644 --- a/src/amd/vulkan/nir/radv_nir_lower_abi.c +++ b/src/amd/vulkan/nir/radv_nir_lower_abi.c @@ -207,11 +207,6 @@ lower_abi_instr(nir_builder *b, nir_intrinsic_instr *intrin, void *state) case nir_intrinsic_load_ring_mesh_scratch_amd: replacement = load_ring(b, RING_MS_SCRATCH, s); break; - case nir_intrinsic_load_ring_mesh_scratch_offset_amd: - /* gs_tg_info[0:11] is ordered_wave_id. Multiply by the ring entry size. */ - replacement = nir_imul_imm(b, nir_iand_imm(b, ac_nir_load_arg(b, &s->args->ac, s->args->ac.gs_tg_info), 0xfff), - AC_MESH_SCRATCH_ENTRY_BYTES); - break; case nir_intrinsic_load_lshs_vertex_stride_amd: { if (stage == MESA_SHADER_VERTEX) { replacement = nir_imm_int(b, get_tcs_input_vertex_stride(s->info->vs.num_linked_outputs));