From 87d22933aedd461ec07464236493fd88e52503d0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Timur=20Krist=C3=B3f?= Date: Mon, 3 Apr 2023 17:47:10 +0200 Subject: [PATCH] radv: Create continue preamble on GFX6 even when no shader rings are used. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Skipping the continue preamble can allow other processes to mess up some registers set by the current process. Originally, we could omit generating the continue preamble when no shader rings were used, because the register initialization happened at the beginning of every main cmdbuf. However, this isn't the case anymore. Cc: mesa-stable Signed-off-by: Timur Kristóf Reviewed-by: Bas Nieuwenhuizen Part-of: --- src/amd/vulkan/radv_queue.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/src/amd/vulkan/radv_queue.c b/src/amd/vulkan/radv_queue.c index e49c536ed6e..f6960d3300a 100644 --- a/src/amd/vulkan/radv_queue.c +++ b/src/amd/vulkan/radv_queue.c @@ -1069,12 +1069,6 @@ radv_update_preamble_cs(struct radv_queue_state *queue, struct radv_device *devi if (!(device->instance->debug_flags & RADV_DEBUG_NO_IBS) && device->physical_device->rad_info.gfx_level >= GFX7) continue; - /* Continue preamble is unnecessary when no shader rings are used. */ - if (!needs->scratch_size_per_wave && !needs->compute_scratch_size_per_wave && - !needs->esgs_ring_size && !needs->gsvs_ring_size && !needs->tess_rings && - !needs->task_rings && !needs->mesh_scratch_ring && !needs->attr_ring_size && - !needs->gds && !needs->gds_oa && !needs->sample_positions) - continue; } enum rgp_flush_bits sqtt_flush_bits = 0;