From 84e61d606b9a62a0363946fcc1ea25e21956b83b Mon Sep 17 00:00:00 2001
From: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Date: Fri, 18 Aug 2023 11:58:27 +0200
Subject: [PATCH] radv/sdma: use correct limits for gfx10.3
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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24771>
---
 src/amd/vulkan/radv_sdma_copy_image.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/amd/vulkan/radv_sdma_copy_image.c b/src/amd/vulkan/radv_sdma_copy_image.c
index a567eb2c318..1a5d1584f1b 100644
--- a/src/amd/vulkan/radv_sdma_copy_image.c
+++ b/src/amd/vulkan/radv_sdma_copy_image.c
@@ -42,8 +42,9 @@ radv_sdma_v4_v5_copy_image_to_buffer(struct radv_device *device, struct radeon_c
 
    /* Linear -> linear sub-window copy. */
    if (image->planes[0].surface.is_linear) {
+      bool is_v5_2 = device->physical_device->rad_info.gfx_level >= GFX10_3;
       uint64_t bytes = (uint64_t)src_pitch * copy_height * bpp;
-      uint32_t chunk_size = 1u << 22;
+      uint32_t chunk_size = 1u << (is_v5_2 ? 30 : 22);
       uint32_t chunk_count = DIV_ROUND_UP(bytes, chunk_size);
 
       ASSERTED unsigned cdw_max = radeon_check_space(device->ws, cs, 7 * chunk_count);