diff --git a/src/amd/vulkan/meta/radv_meta.c b/src/amd/vulkan/meta/radv_meta.c index 63c12627f88..19560fde8e0 100644 --- a/src/amd/vulkan/meta/radv_meta.c +++ b/src/amd/vulkan/meta/radv_meta.c @@ -134,8 +134,9 @@ radv_meta_save(struct radv_meta_saved_state *state, struct radv_cmd_buffer *cmd_ if (state->flags & RADV_META_SAVE_DESCRIPTORS) { state->old_descriptor_set0 = descriptors_state->sets[0]; - if (!(descriptors_state->valid & 1)) - state->flags &= ~RADV_META_SAVE_DESCRIPTORS; + state->old_descriptor_set0_valid = !!(descriptors_state->valid & 0x1); + state->old_descriptor_buffer_addr0 = cmd_buffer->descriptor_buffers[0]; + state->old_descriptor_buffer0 = descriptors_state->descriptor_buffers[0]; } if (state->flags & RADV_META_SAVE_CONSTANTS) { @@ -160,6 +161,7 @@ radv_meta_restore(const struct radv_meta_saved_state *state, struct radv_cmd_buf { VkPipelineBindPoint bind_point = state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE ? VK_PIPELINE_BIND_POINT_GRAPHICS : VK_PIPELINE_BIND_POINT_COMPUTE; + struct radv_descriptor_state *descriptors_state = radv_get_descriptors_state(cmd_buffer, bind_point); if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE) { if (state->old_graphics_pipeline) { @@ -199,7 +201,10 @@ radv_meta_restore(const struct radv_meta_saved_state *state, struct radv_cmd_buf } if (state->flags & RADV_META_SAVE_DESCRIPTORS) { - radv_set_descriptor_set(cmd_buffer, bind_point, state->old_descriptor_set0, 0); + if (state->old_descriptor_set0_valid) + radv_set_descriptor_set(cmd_buffer, bind_point, state->old_descriptor_set0, 0); + cmd_buffer->descriptor_buffers[0] = state->old_descriptor_buffer_addr0; + descriptors_state->descriptor_buffers[0] = state->old_descriptor_buffer0; } if (state->flags & RADV_META_SAVE_CONSTANTS) { @@ -384,3 +389,64 @@ radv_meta_get_noop_pipeline_layout(struct radv_device *device, VkPipelineLayout return vk_meta_get_pipeline_layout(&device->vk, &device->meta_state.device, NULL, NULL, &key, sizeof(key), layout_out); } + +void +radv_meta_bind_descriptors(struct radv_cmd_buffer *cmd_buffer, VkPipelineBindPoint bind_point, VkPipelineLayout _layout, + uint32_t num_descriptors, const VkDescriptorGetInfoEXT *descriptors) +{ + VK_FROM_HANDLE(radv_pipeline_layout, layout, _layout); + struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); + struct radv_descriptor_set_layout *set_layout = layout->set[0].layout; + uint32_t upload_offset; + uint8_t *ptr; + + assert(layout->num_sets == 1); + + if (!radv_cmd_buffer_upload_alloc(cmd_buffer, set_layout->size, &upload_offset, (void *)&ptr)) + return; + + for (uint32_t i = 0; i < num_descriptors; i++) { + const VkDescriptorGetInfoEXT *descriptor = &descriptors[i]; + const uint32_t binding_offset = set_layout->binding[i].offset; + + radv_GetDescriptorEXT(radv_device_to_handle(device), descriptor, 0, ptr + binding_offset); + + VkImageView image_view = VK_NULL_HANDLE; + if (descriptor->type == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER) { + image_view = descriptor->data.pCombinedImageSampler->imageView; + } else if (descriptor->type == VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE) { + image_view = descriptor->data.pSampledImage->imageView; + } else if (descriptor->type == VK_DESCRIPTOR_TYPE_STORAGE_IMAGE) { + image_view = descriptor->data.pStorageImage->imageView; + } + + /* Buffer descriptors use BDA and they should be added to the list before. */ + if (image_view) { + VK_FROM_HANDLE(radv_image_view, iview, image_view); + for (uint32_t b = 0; b < ARRAY_SIZE(iview->image->bindings); b++) { + if (iview->image->bindings[b].bo) + radv_cs_add_buffer(device->ws, cmd_buffer->cs, iview->image->bindings[b].bo); + } + } + } + + const VkDescriptorBufferBindingInfoEXT descriptor_buffer_binding = { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_BUFFER_BINDING_INFO_EXT, + .address = radv_buffer_get_va(cmd_buffer->upload.upload_bo) + upload_offset, + .usage = VK_BUFFER_USAGE_RESOURCE_DESCRIPTOR_BUFFER_BIT_EXT, + }; + + radv_CmdBindDescriptorBuffersEXT(radv_cmd_buffer_to_handle(cmd_buffer), 1, &descriptor_buffer_binding); + + const VkSetDescriptorBufferOffsetsInfoEXT descriptor_buffer_offsets = { + .sType = VK_STRUCTURE_TYPE_SET_DESCRIPTOR_BUFFER_OFFSETS_INFO_EXT, + .stageFlags = vk_shader_stages_from_bind_point(bind_point), + .layout = radv_pipeline_layout_to_handle(layout), + .firstSet = 0, + .setCount = 1, + .pBufferIndices = (uint32_t[]){0}, + .pOffsets = (uint64_t[]){0}, + }; + + radv_CmdSetDescriptorBufferOffsets2EXT(radv_cmd_buffer_to_handle(cmd_buffer), &descriptor_buffer_offsets); +} diff --git a/src/amd/vulkan/meta/radv_meta.h b/src/amd/vulkan/meta/radv_meta.h index b3c891e92a1..d9989a4e8cd 100644 --- a/src/amd/vulkan/meta/radv_meta.h +++ b/src/amd/vulkan/meta/radv_meta.h @@ -46,6 +46,10 @@ struct radv_meta_saved_state { uint32_t flags; struct radv_descriptor_set *old_descriptor_set0; + bool old_descriptor_set0_valid; + uint64_t old_descriptor_buffer_addr0; + uint64_t old_descriptor_buffer0; + struct radv_graphics_pipeline *old_graphics_pipeline; struct radv_compute_pipeline *old_compute_pipeline; struct radv_dynamic_state dynamic; @@ -285,6 +289,10 @@ void radv_depth_stencil_resolve_rendering_fs(struct radv_cmd_buffer *cmd_buffer, VkResult radv_meta_get_noop_pipeline_layout(struct radv_device *device, VkPipelineLayout *layout_out); +void radv_meta_bind_descriptors(struct radv_cmd_buffer *cmd_buffer, VkPipelineBindPoint bind_point, + VkPipelineLayout _layout, uint32_t num_descriptors, + const VkDescriptorGetInfoEXT *descriptors); + #ifdef __cplusplus } #endif diff --git a/src/amd/vulkan/meta/radv_meta_astc_decode.c b/src/amd/vulkan/meta/radv_meta_astc_decode.c index 2e544c5497a..7f949996827 100644 --- a/src/amd/vulkan/meta/radv_meta_astc_decode.c +++ b/src/amd/vulkan/meta/radv_meta_astc_decode.c @@ -17,16 +17,20 @@ decode_astc(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view *src_ivie { struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); struct radv_meta_state *state = &device->meta_state; - struct vk_texcompress_astc_write_descriptor_set write_desc_set; + struct vk_texcompress_astc_write_descriptor_buffer desc_buffer; VkFormat format = src_iview->image->vk.format; int blk_w = vk_format_get_blockwidth(format); int blk_h = vk_format_get_blockheight(format); - vk_texcompress_astc_fill_write_descriptor_sets(state->astc_decode, &write_desc_set, - radv_image_view_to_handle(src_iview), layout, - radv_image_view_to_handle(dst_iview), format); - radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, state->astc_decode->p_layout, 0, - VK_TEXCOMPRESS_ASTC_WRITE_DESC_SET_COUNT, write_desc_set.descriptor_set); + vk_texcompress_astc_fill_write_descriptor_buffer(&device->vk, state->astc_decode, &desc_buffer, + radv_image_view_to_handle(src_iview), layout, + radv_image_view_to_handle(dst_iview), format); + + VK_FROM_HANDLE(radv_buffer, luts_buf, state->astc_decode->luts_buf); + radv_cs_add_buffer(device->ws, cmd_buffer->cs, luts_buf->bo); + + radv_meta_bind_descriptors(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, state->astc_decode->p_layout, + VK_TEXCOMPRESS_ASTC_WRITE_DESC_SET_COUNT, desc_buffer.descriptors); VkPipeline pipeline = vk_texcompress_astc_get_decode_pipeline(&device->vk, &state->alloc, state->astc_decode, state->cache, format); diff --git a/src/amd/vulkan/meta/radv_meta_blit.c b/src/amd/vulkan/meta/radv_meta_blit.c index d6b68daae5e..f6231dd7d23 100644 --- a/src/amd/vulkan/meta/radv_meta_blit.c +++ b/src/amd/vulkan/meta/radv_meta_blit.c @@ -265,19 +265,16 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view *src_i radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline); - radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, layout, 0, 1, - (VkWriteDescriptorSet[]){{.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER, - .pImageInfo = (VkDescriptorImageInfo[]){ - { - .sampler = sampler, - .imageView = radv_image_view_to_handle(src_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - }}}); + radv_meta_bind_descriptors(cmd_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, layout, 1, + (VkDescriptorGetInfoEXT[]){{.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER, + .data.pCombinedImageSampler = (VkDescriptorImageInfo[]){ + { + .sampler = sampler, + .imageView = radv_image_view_to_handle(src_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + }}}); VkRenderingInfo rendering_info = { .sType = VK_STRUCTURE_TYPE_RENDERING_INFO, diff --git a/src/amd/vulkan/meta/radv_meta_blit2d.c b/src/amd/vulkan/meta/radv_meta_blit2d.c index b4645bdecd2..b8af2efdcce 100644 --- a/src/amd/vulkan/meta/radv_meta_blit2d.c +++ b/src/amd/vulkan/meta/radv_meta_blit2d.c @@ -58,31 +58,8 @@ create_iview(struct radv_cmd_buffer *cmd_buffer, struct radv_meta_blit2d_surf *s &(struct radv_image_view_extra_create_info){.disable_dcc_mrt = surf->disable_compression}); } -static void -create_bview(struct radv_cmd_buffer *cmd_buffer, struct radv_meta_blit2d_buffer *src, struct radv_buffer_view *bview, - VkFormat depth_format) -{ - struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); - VkFormat format; - - if (depth_format) - format = depth_format; - else - format = src->format; - radv_buffer_view_init(bview, device, - &(VkBufferViewCreateInfo){ - .sType = VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO, - .flags = 0, - .buffer = radv_buffer_to_handle(src->buffer), - .format = format, - .offset = src->offset, - .range = VK_WHOLE_SIZE, - }); -} - struct blit2d_src_temps { struct radv_image_view iview; - struct radv_buffer_view bview; }; static void @@ -90,17 +67,23 @@ blit2d_bind_src(struct radv_cmd_buffer *cmd_buffer, VkPipelineLayout layout, str struct radv_meta_blit2d_buffer *src_buf, struct blit2d_src_temps *tmp, enum blit2d_src_type src_type, VkFormat depth_format, VkImageAspectFlagBits aspects, uint32_t log2_samples) { - if (src_type == BLIT2D_SRC_TYPE_BUFFER) { - create_bview(cmd_buffer, src_buf, &tmp->bview, depth_format); + struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); - radv_meta_push_descriptor_set( - cmd_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, layout, 0, 1, - (VkWriteDescriptorSet[]){{.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER, - .pTexelBufferView = (VkBufferView[]){radv_buffer_view_to_handle(&tmp->bview)}}}); + if (src_type == BLIT2D_SRC_TYPE_BUFFER) { + radv_cs_add_buffer(device->ws, cmd_buffer->cs, src_buf->buffer->bo); + + radv_meta_bind_descriptors( + cmd_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, layout, 1, + (VkDescriptorGetInfoEXT[]){{ + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER, + .data.pUniformTexelBuffer = + &(VkDescriptorAddressInfoEXT){ + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_ADDRESS_INFO_EXT, + .address = src_buf->buffer->addr + src_buf->offset, + .range = vk_buffer_range(&src_buf->buffer->vk, src_buf->offset, VK_WHOLE_SIZE), + .format = depth_format ? depth_format : src_buf->format}, + }}); vk_common_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer), layout, VK_SHADER_STAGE_FRAGMENT_BIT, 16, 4, &src_buf->pitch); @@ -111,19 +94,16 @@ blit2d_bind_src(struct radv_cmd_buffer *cmd_buffer, VkPipelineLayout layout, str vk_common_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer), layout, VK_SHADER_STAGE_FRAGMENT_BIT, 16, 4, &src_img->layer); - radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, layout, 0, 1, - (VkWriteDescriptorSet[]){{.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, - .pImageInfo = (VkDescriptorImageInfo[]){ - { - .sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(&tmp->iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - }}}); + radv_meta_bind_descriptors(cmd_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, layout, 1, + (VkDescriptorGetInfoEXT[]){{.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .data.pSampledImage = (VkDescriptorImageInfo[]){ + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(&tmp->iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + }}}); } } @@ -253,9 +233,7 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer, struct radv_meta fail_pipeline: - if (src_type == BLIT2D_SRC_TYPE_BUFFER) - radv_buffer_view_finish(&src_temps.bview); - else + if (src_type != BLIT2D_SRC_TYPE_BUFFER) radv_image_view_finish(&src_temps.iview); radv_image_view_finish(&dst_iview); diff --git a/src/amd/vulkan/meta/radv_meta_bufimage.c b/src/amd/vulkan/meta/radv_meta_bufimage.c index a7564f3d9b1..e110ea2a5a6 100644 --- a/src/amd/vulkan/meta/radv_meta_bufimage.c +++ b/src/amd/vulkan/meta/radv_meta_bufimage.c @@ -583,53 +583,22 @@ create_iview(struct radv_cmd_buffer *cmd_buffer, struct radv_meta_blit2d_surf *s }); } -static void -create_bview(struct radv_cmd_buffer *cmd_buffer, struct radv_buffer *buffer, unsigned offset, VkFormat format, - struct radv_buffer_view *bview) +static VkResult +get_r32g32b32_format(VkFormat format) { - struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); - - radv_buffer_view_init(bview, device, - &(VkBufferViewCreateInfo){ - .sType = VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO, - .flags = 0, - .buffer = radv_buffer_to_handle(buffer), - .format = format, - .offset = offset, - .range = VK_WHOLE_SIZE, - }); -} - -static void -create_bview_for_r32g32b32(struct radv_cmd_buffer *cmd_buffer, struct radv_buffer *buffer, unsigned offset, - VkFormat src_format, struct radv_buffer_view *bview) -{ - struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); - VkFormat format; - - switch (src_format) { + switch (format) { case VK_FORMAT_R32G32B32_UINT: - format = VK_FORMAT_R32_UINT; + return VK_FORMAT_R32_UINT; break; case VK_FORMAT_R32G32B32_SINT: - format = VK_FORMAT_R32_SINT; + return VK_FORMAT_R32_SINT; break; case VK_FORMAT_R32G32B32_SFLOAT: - format = VK_FORMAT_R32_SFLOAT; + return VK_FORMAT_R32_SFLOAT; break; default: unreachable("invalid R32G32B32 format"); } - - radv_buffer_view_init(bview, device, - &(VkBufferViewCreateInfo){ - .sType = VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO, - .flags = 0, - .buffer = radv_buffer_to_handle(buffer), - .format = format, - .offset = offset, - .range = VK_WHOLE_SIZE, - }); } /* GFX9+ has an issue where the HW does not calculate mipmap degradations @@ -733,7 +702,6 @@ radv_meta_image_to_buffer(struct radv_cmd_buffer *cmd_buffer, struct radv_meta_b { struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); struct radv_image_view src_view; - struct radv_buffer_view dst_view; VkPipelineLayout layout; VkPipeline pipeline; VkResult result; @@ -745,31 +713,32 @@ radv_meta_image_to_buffer(struct radv_cmd_buffer *cmd_buffer, struct radv_meta_b } create_iview(cmd_buffer, src, &src_view, VK_FORMAT_UNDEFINED, src->aspect_mask); - create_bview(cmd_buffer, dst->buffer, dst->offset, dst->format, &dst_view); - radv_meta_push_descriptor_set( - cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 0, 2, - (VkWriteDescriptorSet[]){{.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, - .pImageInfo = - (VkDescriptorImageInfo[]){ - { - .sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(&src_view), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - }}, - { - .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 1, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER, - .pTexelBufferView = (VkBufferView[]){radv_buffer_view_to_handle(&dst_view)}, - }}); + radv_cs_add_buffer(device->ws, cmd_buffer->cs, dst->buffer->bo); + + radv_meta_bind_descriptors( + cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 2, + (VkDescriptorGetInfoEXT[]){{ + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .data.pSampledImage = + &(VkDescriptorImageInfo){ + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(&src_view), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + }, + { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER, + .data.pStorageTexelBuffer = + &(VkDescriptorAddressInfoEXT){ + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_ADDRESS_INFO_EXT, + .address = dst->buffer->addr + dst->offset, + .range = vk_buffer_range(&dst->buffer->vk, dst->offset, VK_WHOLE_SIZE), + .format = dst->format, + }, + }}); radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); @@ -781,7 +750,6 @@ radv_meta_image_to_buffer(struct radv_cmd_buffer *cmd_buffer, struct radv_meta_b fixup_gfx9_cs_copy(cmd_buffer, dst, src, rect, false); radv_image_view_finish(&src_view); - radv_buffer_view_finish(&dst_view); } static void @@ -789,9 +757,6 @@ radv_meta_buffer_to_image_cs_r32g32b32(struct radv_cmd_buffer *cmd_buffer, struc struct radv_meta_blit2d_surf *dst, struct radv_meta_blit2d_rect *rect) { struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); - struct radv_buffer_view src_view, dst_view; - struct radv_buffer buffer; - unsigned dst_offset = 0; VkPipelineLayout layout; VkPipeline pipeline; unsigned stride; @@ -803,33 +768,34 @@ radv_meta_buffer_to_image_cs_r32g32b32(struct radv_cmd_buffer *cmd_buffer, struc return; } - /* This special btoi path for R32G32B32 formats will write the linear - * image as a buffer with the same underlying memory. The compute - * shader will copy all components separately using a R32 format. - */ - radv_buffer_init(&buffer, device, dst->image->bindings[0].bo, dst->image->size, dst->image->bindings[0].offset); + radv_cs_add_buffer(device->ws, cmd_buffer->cs, src->buffer->bo); + radv_cs_add_buffer(device->ws, cmd_buffer->cs, dst->image->bindings[0].bo); - create_bview(cmd_buffer, src->buffer, src->offset, src->format, &src_view); - create_bview_for_r32g32b32(cmd_buffer, &buffer, dst_offset, dst->format, &dst_view); - - radv_meta_push_descriptor_set( - cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 0, 2, - (VkWriteDescriptorSet[]){{ - .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER, - .pTexelBufferView = (VkBufferView[]){radv_buffer_view_to_handle(&src_view)}, - }, - { - .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 1, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER, - .pTexelBufferView = (VkBufferView[]){radv_buffer_view_to_handle(&dst_view)}, - }}); + radv_meta_bind_descriptors( + cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 2, + (VkDescriptorGetInfoEXT[]){ + { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER, + .data.pUniformTexelBuffer = + &(VkDescriptorAddressInfoEXT){ + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_ADDRESS_INFO_EXT, + .address = src->buffer->addr + src->offset, + .range = vk_buffer_range(&src->buffer->vk, src->offset, VK_WHOLE_SIZE), + .format = src->format, + }, + }, + { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER, + .data.pStorageTexelBuffer = + &(VkDescriptorAddressInfoEXT){ + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_ADDRESS_INFO_EXT, + .address = radv_buffer_get_va(dst->image->bindings[0].bo) + dst->image->bindings[0].offset, + .range = dst->image->size, + .format = get_r32g32b32_format(dst->format), + }, + }}); radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); @@ -846,10 +812,6 @@ radv_meta_buffer_to_image_cs_r32g32b32(struct radv_cmd_buffer *cmd_buffer, struc push_constants); radv_unaligned_dispatch(cmd_buffer, rect->width, rect->height, 1); - - radv_buffer_view_finish(&src_view); - radv_buffer_view_finish(&dst_view); - radv_buffer_finish(&buffer); } void @@ -857,7 +819,6 @@ radv_meta_buffer_to_image_cs(struct radv_cmd_buffer *cmd_buffer, struct radv_met struct radv_meta_blit2d_surf *dst, struct radv_meta_blit2d_rect *rect) { struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); - struct radv_buffer_view src_view; struct radv_image_view dst_view; VkPipelineLayout layout; VkPipeline pipeline; @@ -875,31 +836,32 @@ radv_meta_buffer_to_image_cs(struct radv_cmd_buffer *cmd_buffer, struct radv_met return; } - create_bview(cmd_buffer, src->buffer, src->offset, src->format, &src_view); create_iview(cmd_buffer, dst, &dst_view, VK_FORMAT_UNDEFINED, dst->aspect_mask); - radv_meta_push_descriptor_set( - cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 0, 2, - (VkWriteDescriptorSet[]){{ - .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER, - .pTexelBufferView = (VkBufferView[]){radv_buffer_view_to_handle(&src_view)}, - }, - {.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 1, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, - .pImageInfo = (VkDescriptorImageInfo[]){ - { - .sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(&dst_view), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - }}}); + radv_cs_add_buffer(device->ws, cmd_buffer->cs, src->buffer->bo); + + radv_meta_bind_descriptors( + cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 2, + (VkDescriptorGetInfoEXT[]){{ + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER, + .data.pStorageTexelBuffer = + &(VkDescriptorAddressInfoEXT){ + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_ADDRESS_INFO_EXT, + .address = src->buffer->addr + src->offset, + .range = vk_buffer_range(&src->buffer->vk, src->offset, VK_WHOLE_SIZE), + .format = src->format, + }, + }, + {.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .data.pStorageImage = (VkDescriptorImageInfo[]){ + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(&dst_view), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + }}}); radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); @@ -916,7 +878,6 @@ radv_meta_buffer_to_image_cs(struct radv_cmd_buffer *cmd_buffer, struct radv_met fixup_gfx9_cs_copy(cmd_buffer, src, dst, rect, true); radv_image_view_finish(&dst_view); - radv_buffer_view_finish(&src_view); } static void @@ -924,9 +885,6 @@ radv_meta_image_to_image_cs_r32g32b32(struct radv_cmd_buffer *cmd_buffer, struct struct radv_meta_blit2d_surf *dst, struct radv_meta_blit2d_rect *rect) { struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); - struct radv_buffer_view src_view, dst_view; - struct radv_buffer src_buffer, dst_buffer; - unsigned src_offset = 0, dst_offset = 0; unsigned src_stride, dst_stride; VkPipelineLayout layout; VkPipeline pipeline; @@ -942,34 +900,34 @@ radv_meta_image_to_image_cs_r32g32b32(struct radv_cmd_buffer *cmd_buffer, struct assert(dst->format == VK_FORMAT_R32G32B32_UINT || dst->format == VK_FORMAT_R32G32B32_SINT || dst->format == VK_FORMAT_R32G32B32_SFLOAT); - /* This special itoi path for R32G32B32 formats will write the linear - * image as a buffer with the same underlying memory. The compute - * shader will copy all components separately using a R32 format. - */ - radv_buffer_init(&src_buffer, device, src->image->bindings[0].bo, src->image->size, src->image->bindings[0].offset); - radv_buffer_init(&dst_buffer, device, dst->image->bindings[0].bo, dst->image->size, dst->image->bindings[0].offset); + radv_cs_add_buffer(device->ws, cmd_buffer->cs, src->image->bindings[0].bo); + radv_cs_add_buffer(device->ws, cmd_buffer->cs, dst->image->bindings[0].bo); - create_bview_for_r32g32b32(cmd_buffer, &src_buffer, src_offset, src->format, &src_view); - create_bview_for_r32g32b32(cmd_buffer, &dst_buffer, dst_offset, dst->format, &dst_view); - - radv_meta_push_descriptor_set( - cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 0, 2, - (VkWriteDescriptorSet[]){{ - .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER, - .pTexelBufferView = (VkBufferView[]){radv_buffer_view_to_handle(&src_view)}, - }, - { - .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 1, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER, - .pTexelBufferView = (VkBufferView[]){radv_buffer_view_to_handle(&dst_view)}, - }}); + radv_meta_bind_descriptors( + cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 2, + (VkDescriptorGetInfoEXT[]){ + { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER, + .data.pUniformTexelBuffer = + &(VkDescriptorAddressInfoEXT){ + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_ADDRESS_INFO_EXT, + .address = radv_buffer_get_va(src->image->bindings[0].bo) + src->image->bindings[0].offset, + .range = src->image->size, + .format = get_r32g32b32_format(src->format), + }, + }, + { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER, + .data.pStorageTexelBuffer = + &(VkDescriptorAddressInfoEXT){ + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_ADDRESS_INFO_EXT, + .address = radv_buffer_get_va(dst->image->bindings[0].bo) + dst->image->bindings[0].offset, + .range = dst->image->size, + .format = get_r32g32b32_format(dst->format), + }, + }}); radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); @@ -983,11 +941,6 @@ radv_meta_image_to_image_cs_r32g32b32(struct radv_cmd_buffer *cmd_buffer, struct push_constants); radv_unaligned_dispatch(cmd_buffer, rect->width, rect->height, 1); - - radv_buffer_view_finish(&src_view); - radv_buffer_view_finish(&dst_view); - radv_buffer_finish(&src_buffer); - radv_buffer_finish(&dst_buffer); } void @@ -1043,33 +996,26 @@ radv_meta_image_to_image_cs(struct radv_cmd_buffer *cmd_buffer, struct radv_meta src_aspect_mask); create_iview(cmd_buffer, dst, &dst_view, depth_format, dst_aspect_mask); - radv_meta_push_descriptor_set( - cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 0, 2, - (VkWriteDescriptorSet[]){{.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, - .pImageInfo = - (VkDescriptorImageInfo[]){ - { - .sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(&src_view), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - }}, - {.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 1, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, - .pImageInfo = (VkDescriptorImageInfo[]){ - { - .sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(&dst_view), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - }}}); + radv_meta_bind_descriptors(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 2, + (VkDescriptorGetInfoEXT[]){{.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .data.pSampledImage = + (VkDescriptorImageInfo[]){ + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(&src_view), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + }}, + {.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .data.pStorageImage = (VkDescriptorImageInfo[]){ + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(&dst_view), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + }}}); radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); @@ -1091,8 +1037,6 @@ radv_meta_clear_image_cs_r32g32b32(struct radv_cmd_buffer *cmd_buffer, struct ra const VkClearColorValue *clear_color) { struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); - struct radv_buffer_view dst_view; - struct radv_buffer buffer; VkPipelineLayout layout; VkPipeline pipeline; unsigned stride; @@ -1104,23 +1048,21 @@ radv_meta_clear_image_cs_r32g32b32(struct radv_cmd_buffer *cmd_buffer, struct ra return; } - /* This special clear path for R32G32B32 formats will write the linear - * image as a buffer with the same underlying memory. The compute - * shader will clear all components separately using a R32 format. - */ - radv_buffer_init(&buffer, device, dst->image->bindings[0].bo, dst->image->size, dst->image->bindings[0].offset); + radv_cs_add_buffer(device->ws, cmd_buffer->cs, dst->image->bindings[0].bo); - create_bview_for_r32g32b32(cmd_buffer, &buffer, 0, dst->format, &dst_view); - - radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 0, 1, - (VkWriteDescriptorSet[]){{ - .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER, - .pTexelBufferView = (VkBufferView[]){radv_buffer_view_to_handle(&dst_view)}, - }}); + radv_meta_bind_descriptors( + cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 1, + (VkDescriptorGetInfoEXT[]){{ + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER, + .data.pStorageTexelBuffer = + &(VkDescriptorAddressInfoEXT){ + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_ADDRESS_INFO_EXT, + .address = radv_buffer_get_va(dst->image->bindings[0].bo) + dst->image->bindings[0].offset, + .range = dst->image->size, + .format = get_r32g32b32_format(dst->format), + }, + }}); radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); @@ -1137,9 +1079,6 @@ radv_meta_clear_image_cs_r32g32b32(struct radv_cmd_buffer *cmd_buffer, struct ra push_constants); radv_unaligned_dispatch(cmd_buffer, dst->image->vk.extent.width, dst->image->vk.extent.height, 1); - - radv_buffer_view_finish(&dst_view); - radv_buffer_finish(&buffer); } void @@ -1166,22 +1105,19 @@ radv_meta_clear_image_cs(struct radv_cmd_buffer *cmd_buffer, struct radv_meta_bl create_iview(cmd_buffer, dst, &dst_iview, VK_FORMAT_UNDEFINED, dst->aspect_mask); - radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 0, 1, - (VkWriteDescriptorSet[]){ - {.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, - .pImageInfo = - (VkDescriptorImageInfo[]){ - { - .sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(&dst_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - }}, - }); + radv_meta_bind_descriptors(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 1, + (VkDescriptorGetInfoEXT[]){ + {.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .data.pStorageImage = + (VkDescriptorImageInfo[]){ + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(&dst_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + }}, + }); radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); diff --git a/src/amd/vulkan/meta/radv_meta_clear.c b/src/amd/vulkan/meta/radv_meta_clear.c index 340c4859941..af27198a3c1 100644 --- a/src/amd/vulkan/meta/radv_meta_clear.c +++ b/src/amd/vulkan/meta/radv_meta_clear.c @@ -1032,19 +1032,16 @@ radv_clear_dcc_comp_to_single(struct radv_cmd_buffer *cmd_buffer, struct radv_im }, &(struct radv_image_view_extra_create_info){.disable_compression = true}); - radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 0, 1, - (VkWriteDescriptorSet[]){{.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, - .pImageInfo = (VkDescriptorImageInfo[]){ - { - .sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(&iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - }}}); + radv_meta_bind_descriptors(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 1, + (VkDescriptorGetInfoEXT[]){{.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .data.pStorageImage = (VkDescriptorImageInfo[]){ + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(&iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + }}}); unsigned dcc_width = DIV_ROUND_UP(width, image->planes[0].surface.u.gfx9.color.dcc_block_width); unsigned dcc_height = DIV_ROUND_UP(height, image->planes[0].surface.u.gfx9.color.dcc_block_height); diff --git a/src/amd/vulkan/meta/radv_meta_copy_vrs_htile.c b/src/amd/vulkan/meta/radv_meta_copy_vrs_htile.c index 5ce815db818..08b5276804b 100644 --- a/src/amd/vulkan/meta/radv_meta_copy_vrs_htile.c +++ b/src/amd/vulkan/meta/radv_meta_copy_vrs_htile.c @@ -102,19 +102,16 @@ radv_copy_vrs_htile(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view * radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); - radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 0, 1, - (VkWriteDescriptorSet[]){{.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, - .pImageInfo = (VkDescriptorImageInfo[]){ - { - .sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(vrs_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - }}}); + radv_meta_bind_descriptors(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 1, + (VkDescriptorGetInfoEXT[]){{.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .data.pSampledImage = (VkDescriptorImageInfo[]){ + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(vrs_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + }}}); const unsigned constants[7] = { htile_va, diff --git a/src/amd/vulkan/meta/radv_meta_dcc_retile.c b/src/amd/vulkan/meta/radv_meta_dcc_retile.c index 1aba5713933..a8b7cbac840 100644 --- a/src/amd/vulkan/meta/radv_meta_dcc_retile.c +++ b/src/amd/vulkan/meta/radv_meta_dcc_retile.c @@ -111,7 +111,6 @@ radv_retile_dcc(struct radv_cmd_buffer *cmd_buffer, struct radv_image *image) { struct radv_meta_saved_state saved_state; struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); - struct radv_buffer buffer; VkPipelineLayout layout; VkPipeline pipeline; VkResult result; @@ -135,48 +134,35 @@ radv_retile_dcc(struct radv_cmd_buffer *cmd_buffer, struct radv_image *image) radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); - radv_buffer_init(&buffer, device, image->bindings[0].bo, image->size, image->bindings[0].offset); + const uint64_t va = radv_buffer_get_va(image->bindings[0].bo) + image->bindings[0].offset; - struct radv_buffer_view views[2]; - VkBufferView view_handles[2]; - radv_buffer_view_init(views, device, - &(VkBufferViewCreateInfo){ - .sType = VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO, - .buffer = radv_buffer_to_handle(&buffer), - .offset = image->planes[0].surface.meta_offset, - .range = image->planes[0].surface.meta_size, - .format = VK_FORMAT_R8_UINT, - }); - radv_buffer_view_init(views + 1, device, - &(VkBufferViewCreateInfo){ - .sType = VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO, - .buffer = radv_buffer_to_handle(&buffer), - .offset = image->planes[0].surface.display_dcc_offset, - .range = image->planes[0].surface.u.gfx9.color.display_dcc_size, - .format = VK_FORMAT_R8_UINT, - }); - for (unsigned i = 0; i < 2; ++i) - view_handles[i] = radv_buffer_view_to_handle(&views[i]); + radv_cs_add_buffer(device->ws, cmd_buffer->cs, image->bindings[0].bo); - radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 0, 2, - (VkWriteDescriptorSet[]){ - { - .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER, - .pTexelBufferView = &view_handles[0], - }, - { - .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 1, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER, - .pTexelBufferView = &view_handles[1], - }, - }); + radv_meta_bind_descriptors(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 2, + (VkDescriptorGetInfoEXT[]){ + { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER, + .data.pStorageTexelBuffer = + &(VkDescriptorAddressInfoEXT){ + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_ADDRESS_INFO_EXT, + .address = va + image->planes[0].surface.meta_offset, + .range = image->planes[0].surface.meta_size, + .format = VK_FORMAT_R8_UINT, + }, + }, + { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER, + .data.pStorageTexelBuffer = + &(VkDescriptorAddressInfoEXT){ + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_ADDRESS_INFO_EXT, + .address = va + image->planes[0].surface.display_dcc_offset, + .range = image->planes[0].surface.u.gfx9.color.display_dcc_size, + .format = VK_FORMAT_R8_UINT, + }, + }, + }); unsigned width = DIV_ROUND_UP(image->vk.extent.width, vk_format_get_blockwidth(image->vk.format)); unsigned height = DIV_ROUND_UP(image->vk.extent.height, vk_format_get_blockheight(image->vk.format)); @@ -195,10 +181,6 @@ radv_retile_dcc(struct radv_cmd_buffer *cmd_buffer, struct radv_image *image) radv_unaligned_dispatch(cmd_buffer, dcc_width, dcc_height, 1); - radv_buffer_view_finish(views); - radv_buffer_view_finish(views + 1); - radv_buffer_finish(&buffer); - radv_meta_restore(&saved_state, cmd_buffer); state->flush_bits |= diff --git a/src/amd/vulkan/meta/radv_meta_decompress.c b/src/amd/vulkan/meta/radv_meta_decompress.c index 85ee0fb9021..c411bf770e2 100644 --- a/src/amd/vulkan/meta/radv_meta_decompress.c +++ b/src/amd/vulkan/meta/radv_meta_decompress.c @@ -402,33 +402,27 @@ radv_expand_depth_stencil_compute(struct radv_cmd_buffer *cmd_buffer, struct rad }, &(struct radv_image_view_extra_create_info){.disable_compression = true}); - radv_meta_push_descriptor_set( - cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 0, 2, - (VkWriteDescriptorSet[]){{.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, - .pImageInfo = - (VkDescriptorImageInfo[]){ - { - .sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(&load_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - }}, - {.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 1, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, - .pImageInfo = (VkDescriptorImageInfo[]){ - { - .sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(&store_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - }}}); + radv_meta_bind_descriptors( + cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 2, + (VkDescriptorGetInfoEXT[]){{.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .data.pStorageImage = + (VkDescriptorImageInfo[]){ + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(&load_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + }}, + {.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .data.pStorageImage = (VkDescriptorImageInfo[]){ + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(&store_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + }}}); radv_unaligned_dispatch(cmd_buffer, width, height, 1); diff --git a/src/amd/vulkan/meta/radv_meta_etc_decode.c b/src/amd/vulkan/meta/radv_meta_etc_decode.c index e5aa8883dc0..78e74651806 100644 --- a/src/amd/vulkan/meta/radv_meta_etc_decode.c +++ b/src/amd/vulkan/meta/radv_meta_etc_decode.c @@ -36,31 +36,25 @@ decode_etc(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view *src_iview struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); VkPipeline pipeline = radv_get_etc_decode_pipeline(cmd_buffer); - radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, - device->meta_state.etc_decode.pipeline_layout, 0, 2, - (VkWriteDescriptorSet[]){{.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, - .pImageInfo = - (VkDescriptorImageInfo[]){ - {.sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(src_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL}, - }}, - {.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 1, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, - .pImageInfo = (VkDescriptorImageInfo[]){ - { - .sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(dst_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - }}}); + radv_meta_bind_descriptors(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, device->meta_state.etc_decode.pipeline_layout, + 2, + (VkDescriptorGetInfoEXT[]){{.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .data.pSampledImage = + (VkDescriptorImageInfo[]){ + {.sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(src_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL}, + }}, + {.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .data.pStorageImage = (VkDescriptorImageInfo[]){ + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(dst_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + }}}); radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); diff --git a/src/amd/vulkan/meta/radv_meta_fast_clear.c b/src/amd/vulkan/meta/radv_meta_fast_clear.c index e58a6e2a3bd..ecc12baa7ab 100644 --- a/src/amd/vulkan/meta/radv_meta_fast_clear.c +++ b/src/amd/vulkan/meta/radv_meta_fast_clear.c @@ -522,33 +522,27 @@ radv_decompress_dcc_compute(struct radv_cmd_buffer *cmd_buffer, struct radv_imag }, &(struct radv_image_view_extra_create_info){.disable_compression = true}); - radv_meta_push_descriptor_set( - cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 0, 2, - (VkWriteDescriptorSet[]){{.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, - .pImageInfo = - (VkDescriptorImageInfo[]){ - { - .sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(&load_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - }}, - {.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 1, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, - .pImageInfo = (VkDescriptorImageInfo[]){ - { - .sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(&store_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - }}}); + radv_meta_bind_descriptors( + cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 2, + (VkDescriptorGetInfoEXT[]){{.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .data.pStorageImage = + (VkDescriptorImageInfo[]){ + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(&load_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + }}, + {.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .data.pStorageImage = (VkDescriptorImageInfo[]){ + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(&store_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + }}}); radv_unaligned_dispatch(cmd_buffer, width, height, 1); diff --git a/src/amd/vulkan/meta/radv_meta_fmask_copy.c b/src/amd/vulkan/meta/radv_meta_fmask_copy.c index e42c7fc15b6..5c776b6c78d 100644 --- a/src/amd/vulkan/meta/radv_meta_fmask_copy.c +++ b/src/amd/vulkan/meta/radv_meta_fmask_copy.c @@ -208,28 +208,22 @@ radv_fmask_copy(struct radv_cmd_buffer *cmd_buffer, struct radv_meta_blit2d_surf }, NULL); - radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 0, 2, - (VkWriteDescriptorSet[]){{.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, - .pImageInfo = - (VkDescriptorImageInfo[]){ - {.sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(&src_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL}, - }}, - {.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 1, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, - .pImageInfo = (VkDescriptorImageInfo[]){ - {.sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(&dst_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL}, - }}}); + radv_meta_bind_descriptors(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 2, + (VkDescriptorGetInfoEXT[]){{.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .data.pSampledImage = + (VkDescriptorImageInfo[]){ + {.sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(&src_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL}, + }}, + {.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .data.pStorageImage = (VkDescriptorImageInfo[]){ + {.sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(&dst_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL}, + }}}); radv_unaligned_dispatch(cmd_buffer, src->image->vk.extent.width, src->image->vk.extent.height, 1); diff --git a/src/amd/vulkan/meta/radv_meta_fmask_expand.c b/src/amd/vulkan/meta/radv_meta_fmask_expand.c index ce28a73d4e1..a6ae95608e6 100644 --- a/src/amd/vulkan/meta/radv_meta_fmask_expand.c +++ b/src/amd/vulkan/meta/radv_meta_fmask_expand.c @@ -137,28 +137,22 @@ radv_expand_fmask_image_inplace(struct radv_cmd_buffer *cmd_buffer, struct radv_ cmd_buffer->state.flush_bits |= radv_dst_access_flush(cmd_buffer, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT, VK_ACCESS_2_SHADER_READ_BIT, 0, image, &range); - radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 0, 2, - (VkWriteDescriptorSet[]){{.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, - .pImageInfo = - (VkDescriptorImageInfo[]){ - {.sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(&iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL}, - }}, - {.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 1, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, - .pImageInfo = (VkDescriptorImageInfo[]){ - {.sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(&iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL}, - }}}); + radv_meta_bind_descriptors(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 2, + (VkDescriptorGetInfoEXT[]){{.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .data.pSampledImage = + (VkDescriptorImageInfo[]){ + {.sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(&iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL}, + }}, + {.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .data.pStorageImage = (VkDescriptorImageInfo[]){ + {.sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(&iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL}, + }}}); radv_unaligned_dispatch(cmd_buffer, image->vk.extent.width, image->vk.extent.height, layer_count); diff --git a/src/amd/vulkan/meta/radv_meta_resolve_cs.c b/src/amd/vulkan/meta/radv_meta_resolve_cs.c index 70c21a1f91a..004f2a17e2e 100644 --- a/src/amd/vulkan/meta/radv_meta_resolve_cs.c +++ b/src/amd/vulkan/meta/radv_meta_resolve_cs.c @@ -123,30 +123,24 @@ emit_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view *src_ivi return; } - radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 0, 2, - (VkWriteDescriptorSet[]){{.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, - .pImageInfo = - (VkDescriptorImageInfo[]){ - {.sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(src_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL}, - }}, - {.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 1, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, - .pImageInfo = (VkDescriptorImageInfo[]){ - { - .sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(dst_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - }}}); + radv_meta_bind_descriptors(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 2, + (VkDescriptorGetInfoEXT[]){{.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .data.pSampledImage = + (VkDescriptorImageInfo[]){ + {.sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(src_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL}, + }}, + {.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .data.pStorageImage = (VkDescriptorImageInfo[]){ + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(dst_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + }}}); radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); @@ -237,30 +231,24 @@ emit_depth_stencil_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image return; } - radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 0, 2, - (VkWriteDescriptorSet[]){{.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, - .pImageInfo = - (VkDescriptorImageInfo[]){ - {.sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(src_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL}, - }}, - {.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 1, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, - .pImageInfo = (VkDescriptorImageInfo[]){ - { - .sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(dst_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - }}}); + radv_meta_bind_descriptors(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, layout, 2, + (VkDescriptorGetInfoEXT[]){{.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .data.pSampledImage = + (VkDescriptorImageInfo[]){ + {.sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(src_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL}, + }}, + {.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .data.pStorageImage = (VkDescriptorImageInfo[]){ + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(dst_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + }}}); radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); diff --git a/src/amd/vulkan/meta/radv_meta_resolve_fs.c b/src/amd/vulkan/meta/radv_meta_resolve_fs.c index 805d4231d60..a64879c2c54 100644 --- a/src/amd/vulkan/meta/radv_meta_resolve_fs.c +++ b/src/amd/vulkan/meta/radv_meta_resolve_fs.c @@ -333,22 +333,19 @@ emit_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view *src_ivi return; } - radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, layout, 0, 1, - (VkWriteDescriptorSet[]){ - {.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, - .pImageInfo = - (VkDescriptorImageInfo[]){ - { - .sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(src_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - }}, - }); + radv_meta_bind_descriptors(cmd_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, layout, 1, + (VkDescriptorGetInfoEXT[]){ + {.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .data.pSampledImage = + (VkDescriptorImageInfo[]){ + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(src_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + }}, + }); const VkImageSubresourceRange src_range = vk_image_view_subresource_range(&src_iview->vk); const VkImageSubresourceRange dst_range = vk_image_view_subresource_range(&dst_iview->vk); @@ -392,22 +389,19 @@ emit_depth_stencil_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image return; } - radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, layout, 0, 1, - (VkWriteDescriptorSet[]){ - {.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, - .pImageInfo = - (VkDescriptorImageInfo[]){ - { - .sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(src_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - }}, - }); + radv_meta_bind_descriptors(cmd_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, layout, 1, + (VkDescriptorGetInfoEXT[]){ + {.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_GET_INFO_EXT, + .type = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .data.pSampledImage = + (VkDescriptorImageInfo[]){ + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(src_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + }}, + }); radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline); diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 65d0870ad55..53da156ac6a 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -358,8 +358,6 @@ radv_destroy_cmd_buffer(struct vk_command_buffer *vk_cmd_buffer) vk_descriptor_set_layout_unref(&device->vk, &set->layout->vk); vk_object_base_finish(&set->base); } - - vk_object_base_finish(&cmd_buffer->meta_push_descriptors.base); } vk_command_buffer_finish(&cmd_buffer->vk); @@ -403,8 +401,6 @@ radv_create_cmd_buffer(struct vk_command_pool *pool, VkCommandBufferLevel level, return vk_error(device, VK_ERROR_OUT_OF_DEVICE_MEMORY); } - vk_object_base_init(&device->vk, &cmd_buffer->meta_push_descriptors.base, VK_OBJECT_TYPE_DESCRIPTOR_SET); - for (unsigned i = 0; i < MAX_BIND_POINTS; i++) vk_object_base_init(&device->vk, &cmd_buffer->descriptors[i].push_set.set.base, VK_OBJECT_TYPE_DESCRIPTOR_SET); @@ -7191,35 +7187,6 @@ radv_init_push_descriptor_set(struct radv_cmd_buffer *cmd_buffer, struct radv_de return true; } -void -radv_meta_push_descriptor_set(struct radv_cmd_buffer *cmd_buffer, VkPipelineBindPoint pipelineBindPoint, - VkPipelineLayout _layout, uint32_t set, uint32_t descriptorWriteCount, - const VkWriteDescriptorSet *pDescriptorWrites) -{ - VK_FROM_HANDLE(radv_pipeline_layout, layout, _layout); - struct radv_descriptor_set *push_set = (struct radv_descriptor_set *)&cmd_buffer->meta_push_descriptors; - struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); - unsigned bo_offset; - - assert(set == 0); - assert(layout->set[set].layout->flags & VK_DESCRIPTOR_SET_LAYOUT_CREATE_PUSH_DESCRIPTOR_BIT); - - push_set->header.size = layout->set[set].layout->size; - push_set->header.layout = layout->set[set].layout; - - if (!radv_cmd_buffer_upload_alloc(cmd_buffer, push_set->header.size, &bo_offset, - (void **)&push_set->header.mapped_ptr)) - return; - - push_set->header.va = radv_buffer_get_va(cmd_buffer->upload.upload_bo); - push_set->header.va += bo_offset; - - radv_cmd_update_descriptor_sets(device, cmd_buffer, radv_descriptor_set_to_handle(push_set), descriptorWriteCount, - pDescriptorWrites, 0, NULL); - - radv_set_descriptor_set(cmd_buffer, pipelineBindPoint, push_set, set); -} - static void radv_push_descriptor_set(struct radv_cmd_buffer *cmd_buffer, const VkPushDescriptorSetInfoKHR *pPushDescriptorSetInfo, VkPipelineBindPoint bind_point) diff --git a/src/amd/vulkan/radv_cmd_buffer.h b/src/amd/vulkan/radv_cmd_buffer.h index 04fb87d03d1..db0bfbe9d17 100644 --- a/src/amd/vulkan/radv_cmd_buffer.h +++ b/src/amd/vulkan/radv_cmd_buffer.h @@ -526,7 +526,6 @@ struct radv_cmd_buffer { uint8_t push_constants[MAX_PUSH_CONSTANTS_SIZE]; VkShaderStageFlags push_constant_stages; - struct radv_descriptor_set_header meta_push_descriptors; struct radv_descriptor_state descriptors[MAX_BIND_POINTS]; @@ -756,10 +755,6 @@ struct radv_resolve_barrier { void radv_emit_resolve_barrier(struct radv_cmd_buffer *cmd_buffer, const struct radv_resolve_barrier *barrier); -void radv_meta_push_descriptor_set(struct radv_cmd_buffer *cmd_buffer, VkPipelineBindPoint pipelineBindPoint, - VkPipelineLayout _layout, uint32_t set, uint32_t descriptorWriteCount, - const VkWriteDescriptorSet *pDescriptorWrites); - struct radv_dispatch_info { /** * Determine the layout of the grid (in block units) to be used.