From 845e7c4426077736299e5b6fe2313b347fa71257 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Mon, 14 Jul 2025 00:50:34 +0200 Subject: [PATCH] etnaviv: stop touching code steering bits while updating uniforms Bit 0 of the SH_CONTROL register does not control uniform cache flushes so stop touching this bit when updating the uniforms. While it is harmless to change the bit at this time in the emit sequence, it's confusing and not needed. Signed-off-by: Lucas Stach Reviewed-by: Christian Gmeiner Part-of: --- src/gallium/drivers/etnaviv/etnaviv_emit.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c b/src/gallium/drivers/etnaviv/etnaviv_emit.c index bb855d08076..b7009e4a1eb 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_emit.c +++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c @@ -723,12 +723,12 @@ etna_emit_state(struct etna_context *ctx) } if (do_uniform_flush) - etna_set_state(stream, VIVS_SH_CONTROL, VIVS_SH_CONTROL_PS_CODE); + etna_set_state(stream, VIVS_SH_CONTROL, 0x0); etna_uniforms_write(ctx, ctx->shader.vs, ctx->constant_buffer[PIPE_SHADER_VERTEX].cb); if (do_uniform_flush) - etna_set_state(stream, VIVS_SH_CONTROL, VIVS_SH_CONTROL_PS_CODE | VIVS_SH_CONTROL_PS_UNIFORM); + etna_set_state(stream, VIVS_SH_CONTROL, VIVS_SH_CONTROL_PS_UNIFORM); etna_uniforms_write(ctx, ctx->shader.fs, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].cb); @@ -741,14 +741,14 @@ etna_emit_state(struct etna_context *ctx) } else { /* ideally this cache would only be flushed if there are VS uniform changes */ if (do_uniform_flush) - etna_set_state(stream, VIVS_SH_CONTROL, VIVS_SH_CONTROL_PS_CODE); + etna_set_state(stream, VIVS_SH_CONTROL, 0x0); if (dirty & (uniform_dirty_bits | ctx->shader.vs->uniforms_dirty_bits)) etna_uniforms_write(ctx, ctx->shader.vs, ctx->constant_buffer[PIPE_SHADER_VERTEX].cb); /* ideally this cache would only be flushed if there are PS uniform changes */ if (do_uniform_flush) - etna_set_state(stream, VIVS_SH_CONTROL, VIVS_SH_CONTROL_PS_CODE | VIVS_SH_CONTROL_PS_UNIFORM); + etna_set_state(stream, VIVS_SH_CONTROL, VIVS_SH_CONTROL_PS_UNIFORM); if (dirty & (uniform_dirty_bits | ctx->shader.fs->uniforms_dirty_bits)) etna_uniforms_write(ctx, ctx->shader.fs, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].cb);