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radv/aco,aco: allow SMEM SSBO loads on GFX6/7

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Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
This commit is contained in:
Rhys Perry
2020-05-25 14:49:53 +01:00
committed by Marge Bot
parent 35b5e1fc7c
commit 841fdfcd45
3 changed files with 3 additions and 4 deletions
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src/amd/compiler/aco_instruction_selection_setup.cpp
+1 -1
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@@ -348,7 +348,7 @@ void fill_desc_set_info(isel_context *ctx, nir_function_impl *impl)
bool glc = access & (ACCESS_VOLATILE | ACCESS_COHERENT | ACCESS_NON_READABLE);
switch (intrin->intrinsic) {
case nir_intrinsic_load_ssbo: {
if (nir_dest_is_divergent(intrin->dest) || ctx->program->chip_class < GFX8)
if (nir_dest_is_divergent(intrin->dest) && (!glc || ctx->program->chip_class >= GFX8))
flags |= glc ? has_glc_vmem_load : has_nonglc_vmem_load;
res = intrin->src[0].ssa;
break;