diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
index 6be725a5cab..2777762a322 100644
--- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
+++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
@@ -725,6 +725,10 @@ lower_image_intrinsic(nir_intrinsic_instr *intrin,
    nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
    nir_variable *var = nir_deref_instr_get_variable(deref);
 
+   unsigned set = var->data.descriptor_set;
+   unsigned binding = var->data.binding;
+   unsigned binding_offset = state->set[set].surface_offsets[binding];
+
    nir_builder *b = &state->builder;
    b->cursor = nir_before_instr(&intrin->instr);
 
@@ -742,7 +746,7 @@ lower_image_intrinsic(nir_intrinsic_instr *intrin,
                                intrin->dest.ssa.bit_size, state);
 
       nir_ssa_def_rewrite_uses(&intrin->dest.ssa, nir_src_for_ssa(desc));
-   } else if (use_bindless) {
+   } else if (binding_offset > MAX_BINDING_TABLE_SIZE) {
       const bool write_only =
          (var->data.image.access & ACCESS_NON_READABLE) != 0;
       nir_ssa_def *desc =
@@ -750,9 +754,6 @@ lower_image_intrinsic(nir_intrinsic_instr *intrin,
       nir_ssa_def *handle = nir_channel(b, desc, write_only ? 1 : 0);
       nir_rewrite_image_intrinsic(intrin, handle, true);
    } else {
-      unsigned set = var->data.descriptor_set;
-      unsigned binding = var->data.binding;
-      unsigned binding_offset = state->set[set].surface_offsets[binding];
       unsigned array_size =
          state->layout->set[set].layout->binding[binding].array_size;