From 829ea357146683f74d93b66de86fcf2c88b1ff57 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Iv=C3=A1n=20Briano?= Date: Tue, 16 Apr 2024 14:45:39 -0700 Subject: [PATCH] compiler: reorder FLOAT_CONTROLS enums So we can use less bits to store some of them in nir_alu_instr. Reviewed-by: Alyssa Rosenzweig Part-of: --- src/compiler/shader_enums.h | 34 +++++++++++++++++++--------------- 1 file changed, 19 insertions(+), 15 deletions(-) diff --git a/src/compiler/shader_enums.h b/src/compiler/shader_enums.h index 2557df737b6..89d6701436e 100644 --- a/src/compiler/shader_enums.h +++ b/src/compiler/shader_enums.h @@ -1419,22 +1419,26 @@ enum gl_derivative_group { enum float_controls { + /* The order of these matters. For float_controls2, only the first 9 bits + * are used and stored per-instruction in nir_alu_instr::fp_fast_math. + * Any changes in this enum need to be synchronized with that. + */ FLOAT_CONTROLS_DEFAULT_FLOAT_CONTROL_MODE = 0, - FLOAT_CONTROLS_DENORM_PRESERVE_FP16 = BITFIELD_BIT(0), - FLOAT_CONTROLS_DENORM_PRESERVE_FP32 = BITFIELD_BIT(1), - FLOAT_CONTROLS_DENORM_PRESERVE_FP64 = BITFIELD_BIT(2), - FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16 = BITFIELD_BIT(3), - FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32 = BITFIELD_BIT(4), - FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64 = BITFIELD_BIT(5), - FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE_FP16 = BITFIELD_BIT(6), - FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE_FP32 = BITFIELD_BIT(7), - FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE_FP64 = BITFIELD_BIT(8), - FLOAT_CONTROLS_INF_PRESERVE_FP16 = BITFIELD_BIT(9), - FLOAT_CONTROLS_INF_PRESERVE_FP32 = BITFIELD_BIT(10), - FLOAT_CONTROLS_INF_PRESERVE_FP64 = BITFIELD_BIT(11), - FLOAT_CONTROLS_NAN_PRESERVE_FP16 = BITFIELD_BIT(12), - FLOAT_CONTROLS_NAN_PRESERVE_FP32 = BITFIELD_BIT(13), - FLOAT_CONTROLS_NAN_PRESERVE_FP64 = BITFIELD_BIT(14), + FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE_FP16 = BITFIELD_BIT(0), + FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE_FP32 = BITFIELD_BIT(1), + FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE_FP64 = BITFIELD_BIT(2), + FLOAT_CONTROLS_INF_PRESERVE_FP16 = BITFIELD_BIT(3), + FLOAT_CONTROLS_INF_PRESERVE_FP32 = BITFIELD_BIT(4), + FLOAT_CONTROLS_INF_PRESERVE_FP64 = BITFIELD_BIT(5), + FLOAT_CONTROLS_NAN_PRESERVE_FP16 = BITFIELD_BIT(6), + FLOAT_CONTROLS_NAN_PRESERVE_FP32 = BITFIELD_BIT(7), + FLOAT_CONTROLS_NAN_PRESERVE_FP64 = BITFIELD_BIT(8), + FLOAT_CONTROLS_DENORM_PRESERVE_FP16 = BITFIELD_BIT(9), + FLOAT_CONTROLS_DENORM_PRESERVE_FP32 = BITFIELD_BIT(10), + FLOAT_CONTROLS_DENORM_PRESERVE_FP64 = BITFIELD_BIT(11), + FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16 = BITFIELD_BIT(12), + FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32 = BITFIELD_BIT(13), + FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64 = BITFIELD_BIT(14), FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16 = BITFIELD_BIT(15), FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32 = BITFIELD_BIT(16), FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64 = BITFIELD_BIT(17),