diff --git a/src/amd/compiler/README-ISA.md b/src/amd/compiler/README-ISA.md index 678759ff25c..a790522ba4f 100644 --- a/src/amd/compiler/README-ISA.md +++ b/src/amd/compiler/README-ISA.md @@ -246,3 +246,7 @@ or vice versa: DS instruction, then a branch, then a VMEM/GLOBAL/SCRATCH instruc Mitigated by: Only `s_waitcnt_vscnt null, 0`. Needed even if the first instruction is a load. + +### NSAClauseBug + +"MIMG-NSA in a hard clause has unpredictable results on GFX10.1" diff --git a/src/amd/compiler/aco_form_hard_clauses.cpp b/src/amd/compiler/aco_form_hard_clauses.cpp index 13e9dfadc3d..223a4e2478a 100644 --- a/src/amd/compiler/aco_form_hard_clauses.cpp +++ b/src/amd/compiler/aco_form_hard_clauses.cpp @@ -73,14 +73,18 @@ void form_hard_clauses(Program *program) aco_ptr& instr = block.instructions[i]; clause_type type = clause_other; - if (instr->isVMEM() && !instr->operands.empty()) + if (instr->isVMEM() && !instr->operands.empty()) { + if (program->chip_class == GFX10 && instr->isMIMG() && get_mimg_nsa_dwords(instr.get()) > 0) + type = clause_other; + else + type = clause_vmem; + } else if (instr->isScratch() || instr->isGlobal()) { type = clause_vmem; - else if (instr->isScratch() || instr->isGlobal()) - type = clause_vmem; - else if (instr->isFlat()) + } else if (instr->isFlat()) { type = clause_flat; - else if (instr->isSMEM() && !instr->operands.empty()) + } else if (instr->isSMEM() && !instr->operands.empty()) { type = clause_smem; + } if (type != current_type || num_instrs == 64 || (num_instrs && !should_form_clause(current_instrs[0].get(), instr.get()))) { diff --git a/src/amd/compiler/tests/helpers.cpp b/src/amd/compiler/tests/helpers.cpp index 52f93e09ac4..7f3202fe3eb 100644 --- a/src/amd/compiler/tests/helpers.cpp +++ b/src/amd/compiler/tests/helpers.cpp @@ -265,6 +265,9 @@ VkDevice get_vk_device(enum chip_class chip_class) case GFX10: family = CHIP_NAVI10; break; + case GFX10_3: + family = CHIP_SIENNA_CICHLID; + break; default: family = CHIP_UNKNOWN; break; diff --git a/src/amd/compiler/tests/test_isel.cpp b/src/amd/compiler/tests/test_isel.cpp index 6434553eadf..a6aae159064 100644 --- a/src/amd/compiler/tests/test_isel.cpp +++ b/src/amd/compiler/tests/test_isel.cpp @@ -137,7 +137,7 @@ BEGIN_TEST(isel.gs.no_verts) END_TEST BEGIN_TEST(isel.sparse.clause) - for (unsigned i = GFX10; i <= GFX10; i++) { + for (unsigned i = GFX10_3; i <= GFX10_3; i++) { if (!set_variant((chip_class)i)) continue;